Built-in test for VLSI: pseudorandom techniques
This handbook provides ready access to all of the major concepts, techniques, problems, and solutions in the emerging field of pseudorandom pattern testing. Until now, the literature in this area has been widely scattered, and published work, written by professionals in several disciplines, has trea...
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| Format: | Elektronisch E-Book |
| Sprache: | Englisch |
| Veröffentlicht: |
New York
Wiley
1987
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| Schlagwörter: | |
| Links: | https://learning.oreilly.com/library/view/-/9780471624639/?ar |
| Zusammenfassung: | This handbook provides ready access to all of the major concepts, techniques, problems, and solutions in the emerging field of pseudorandom pattern testing. Until now, the literature in this area has been widely scattered, and published work, written by professionals in several disciplines, has treated notation and mathematics in ways that vary from source to source. This book opens with a clear description of the shortcomings of conventional testing as applied to complex digital circuits, revewing by comparison the principles of design for testability of more advanced digital technology. Offers in-depth discussions of test sequence generation and response data compression, including pseudorandom sequence generators; the mathematics of shift-register sequences and their potential for built-in testing. Also details random and memory testing and the problems of assessing the efficiency of such tests, and the limitations and practical concerns of built-in testing. |
| Beschreibung: | Includes bibliographical references (pages 339-345) and index. - Print version record |
| Umfang: | 1 Online-Ressource (xiii, 354 Seiten) illustrations |
| Format: | Master and use copy. Digital master created according to Benchmark for Faithful Digital Reproductions of Monographs and Serials, Version 1. Digital Library Federation, December 2002. |
| ISBN: | 9780471624639 |
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| spelling | Bardell, Paul H. VerfasserIn aut Built-in test for VLSI pseudorandom techniques Paul H. Bardell, William H. McAnney, Jacob Savir New York Wiley 1987 [Place of publication not identified] HathiTrust Digital Library 1 Online-Ressource (xiii, 354 Seiten) illustrations Text txt rdacontent Computermedien c rdamedia Online-Ressource cr rdacarrier Includes bibliographical references (pages 339-345) and index. - Print version record Restrictions unspecified star This handbook provides ready access to all of the major concepts, techniques, problems, and solutions in the emerging field of pseudorandom pattern testing. Until now, the literature in this area has been widely scattered, and published work, written by professionals in several disciplines, has treated notation and mathematics in ways that vary from source to source. This book opens with a clear description of the shortcomings of conventional testing as applied to complex digital circuits, revewing by comparison the principles of design for testability of more advanced digital technology. Offers in-depth discussions of test sequence generation and response data compression, including pseudorandom sequence generators; the mathematics of shift-register sequences and their potential for built-in testing. Also details random and memory testing and the problems of assessing the efficiency of such tests, and the limitations and practical concerns of built-in testing. Master and use copy. Digital master created according to Benchmark for Faithful Digital Reproductions of Monographs and Serials, Version 1. Digital Library Federation, December 2002. English. Integrated circuits Very large scale integration Testing Circuits intégrés à très grande échelle ; Essais Integrated circuits ; Very large scale integration ; Testing Electrical & Computer Engineering Engineering & Applied Sciences Electrical Engineering Electronic equipment ; Very large scale integrated circuits ; Testing McAnney, William H. MitwirkendeR ctb Savir, Jacob MitwirkendeR ctb |
| spellingShingle | Bardell, Paul H. Built-in test for VLSI pseudorandom techniques Integrated circuits Very large scale integration Testing Circuits intégrés à très grande échelle ; Essais Integrated circuits ; Very large scale integration ; Testing Electrical & Computer Engineering Engineering & Applied Sciences Electrical Engineering Electronic equipment ; Very large scale integrated circuits ; Testing |
| title | Built-in test for VLSI pseudorandom techniques |
| title_auth | Built-in test for VLSI pseudorandom techniques |
| title_exact_search | Built-in test for VLSI pseudorandom techniques |
| title_full | Built-in test for VLSI pseudorandom techniques Paul H. Bardell, William H. McAnney, Jacob Savir |
| title_fullStr | Built-in test for VLSI pseudorandom techniques Paul H. Bardell, William H. McAnney, Jacob Savir |
| title_full_unstemmed | Built-in test for VLSI pseudorandom techniques Paul H. Bardell, William H. McAnney, Jacob Savir |
| title_short | Built-in test for VLSI |
| title_sort | built in test for vlsi pseudorandom techniques |
| title_sub | pseudorandom techniques |
| topic | Integrated circuits Very large scale integration Testing Circuits intégrés à très grande échelle ; Essais Integrated circuits ; Very large scale integration ; Testing Electrical & Computer Engineering Engineering & Applied Sciences Electrical Engineering Electronic equipment ; Very large scale integrated circuits ; Testing |
| topic_facet | Integrated circuits Very large scale integration Testing Circuits intégrés à très grande échelle ; Essais Integrated circuits ; Very large scale integration ; Testing Electrical & Computer Engineering Engineering & Applied Sciences Electrical Engineering Electronic equipment ; Very large scale integrated circuits ; Testing |
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