Availability: Logic synthesis and verification algorithms

Logic synthesis and verification algorithms:

Saved in:

Bibliographic Details
Main Author:	Hachtel, Gary D. (Author)
Format:	Electronic eBook
Language:	English
Published:	Boston Kluwer Academic c2002, 1996
Subjects:	Computer-aided design Integrated circuits > Verification Integrated circuits > Very large scale integration > Design and construction > Data processing Logic design > Data processing Logiksynthese Logischer Entwurf
Physical Description:	xxxii, 597 p.
ISBN:	0306475928 0792397460

Staff View

MARC


LEADER	00000nam a2200000zc 4500
001	BV044831066
003	DE-604
005	20180305
007	cr\|uuu---uuuuu
008	180305s2002 xx o\|\|\|\| 00\|\|\| eng d
020			\|a 0306475928 \|c Online \|9 0-306-47592-8
020			\|a 0792397460 \|c alk. paper \|9 0-7923-9746-0
035			\|a (ZDB-38-ESG)ebr10053328
035			\|a (OCoLC)70757204
035			\|a (DE-599)BVBBV044831066
040			\|a DE-604 \|b ger \|e aacr
041	0		\|a eng
100	1		\|a Hachtel, Gary D. \|e Verfasser \|4 aut
245	1	0	\|a Logic synthesis and verification algorithms \|c by Gary D. Hachtel, Fabio Somenzi
264		1	\|a Boston \|b Kluwer Academic \|c c2002, 1996
300			\|a xxxii, 597 p.
336			\|b txt \|2 rdacontent
337			\|b c \|2 rdamedia
338			\|b cr \|2 rdacarrier
505	8		\|a Includes bibliographical references and index
650		4	\|a Computer-aided design
650		4	\|a Integrated circuits \|x Verification
650		4	\|a Integrated circuits \|x Very large scale integration \|x Design and construction \|x Data processing
650		4	\|a Logic design \|x Data processing
650	0	7	\|a Logiksynthese \|0 (DE-588)4348178-4 \|2 gnd \|9 rswk-swf
650	0	7	\|a Logischer Entwurf \|0 (DE-588)4168051-0 \|2 gnd \|9 rswk-swf
689	0	0	\|a Logischer Entwurf \|0 (DE-588)4168051-0 \|D s
689	0		\|8 1\p \|5 DE-604
689	1	0	\|a Logiksynthese \|0 (DE-588)4348178-4 \|D s
689	1		\|8 2\p \|5 DE-604
700	1		\|a Somenzi, Fabio \|e Sonstige \|4 oth
912			\|a ZDB-38-ESG
883	1		\|8 1\p \|a cgwrk \|d 20201028 \|q DE-101 \|u https://d-nb.info/provenance/plan#cgwrk
883	1		\|8 2\p \|a cgwrk \|d 20201028 \|q DE-101 \|u https://d-nb.info/provenance/plan#cgwrk
943	1		\|a oai:aleph.bib-bvb.de:BVB01-030225930

Record in the Search Index

_version_	1818983981460226048
any_adam_object
author	Hachtel, Gary D.
author_facet	Hachtel, Gary D.
author_role	aut
author_sort	Hachtel, Gary D.
author_variant	g d h gd gdh
building	Verbundindex
bvnumber	BV044831066
collection	ZDB-38-ESG
contents	Includes bibliographical references and index
ctrlnum	(ZDB-38-ESG)ebr10053328 (OCoLC)70757204 (DE-599)BVBBV044831066
format	Electronic eBook
fullrecord	<?xml version="1.0" encoding="UTF-8"?><collection xmlns="http://www.loc.gov/MARC21/slim"><record><leader>01663nam a2200445zc 4500</leader><controlfield tag="001">BV044831066</controlfield><controlfield tag="003">DE-604</controlfield><controlfield tag="005">20180305 </controlfield><controlfield tag="007">cr\|uuu---uuuuu</controlfield><controlfield tag="008">180305s2002 xx o\|\|\|\| 00\|\|\| eng d</controlfield><datafield tag="020" ind1=" " ind2=" "><subfield code="a">0306475928</subfield><subfield code="c">Online</subfield><subfield code="9">0-306-47592-8</subfield></datafield><datafield tag="020" ind1=" " ind2=" "><subfield code="a">0792397460</subfield><subfield code="c">alk. paper</subfield><subfield code="9">0-7923-9746-0</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(ZDB-38-ESG)ebr10053328</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(OCoLC)70757204</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(DE-599)BVBBV044831066</subfield></datafield><datafield tag="040" ind1=" " ind2=" "><subfield code="a">DE-604</subfield><subfield code="b">ger</subfield><subfield code="e">aacr</subfield></datafield><datafield tag="041" ind1="0" ind2=" "><subfield code="a">eng</subfield></datafield><datafield tag="100" ind1="1" ind2=" "><subfield code="a">Hachtel, Gary D.</subfield><subfield code="e">Verfasser</subfield><subfield code="4">aut</subfield></datafield><datafield tag="245" ind1="1" ind2="0"><subfield code="a">Logic synthesis and verification algorithms</subfield><subfield code="c">by Gary D. Hachtel, Fabio Somenzi</subfield></datafield><datafield tag="264" ind1=" " ind2="1"><subfield code="a">Boston</subfield><subfield code="b">Kluwer Academic</subfield><subfield code="c">c2002, 1996</subfield></datafield><datafield tag="300" ind1=" " ind2=" "><subfield code="a">xxxii, 597 p.</subfield></datafield><datafield tag="336" ind1=" " ind2=" "><subfield code="b">txt</subfield><subfield code="2">rdacontent</subfield></datafield><datafield tag="337" ind1=" " ind2=" "><subfield code="b">c</subfield><subfield code="2">rdamedia</subfield></datafield><datafield tag="338" ind1=" " ind2=" "><subfield code="b">cr</subfield><subfield code="2">rdacarrier</subfield></datafield><datafield tag="505" ind1="8" ind2=" "><subfield code="a">Includes bibliographical references and index</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Computer-aided design</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Integrated circuits</subfield><subfield code="x">Verification</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Integrated circuits</subfield><subfield code="x">Very large scale integration</subfield><subfield code="x">Design and construction</subfield><subfield code="x">Data processing</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Logic design</subfield><subfield code="x">Data processing</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">Logiksynthese</subfield><subfield code="0">(DE-588)4348178-4</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">Logischer Entwurf</subfield><subfield code="0">(DE-588)4168051-0</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="689" ind1="0" ind2="0"><subfield code="a">Logischer Entwurf</subfield><subfield code="0">(DE-588)4168051-0</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="0" ind2=" "><subfield code="8">1\p</subfield><subfield code="5">DE-604</subfield></datafield><datafield tag="689" ind1="1" ind2="0"><subfield code="a">Logiksynthese</subfield><subfield code="0">(DE-588)4348178-4</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="1" ind2=" "><subfield code="8">2\p</subfield><subfield code="5">DE-604</subfield></datafield><datafield tag="700" ind1="1" ind2=" "><subfield code="a">Somenzi, Fabio</subfield><subfield code="e">Sonstige</subfield><subfield code="4">oth</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">ZDB-38-ESG</subfield></datafield><datafield tag="883" ind1="1" ind2=" "><subfield code="8">1\p</subfield><subfield code="a">cgwrk</subfield><subfield code="d">20201028</subfield><subfield code="q">DE-101</subfield><subfield code="u">https://d-nb.info/provenance/plan#cgwrk</subfield></datafield><datafield tag="883" ind1="1" ind2=" "><subfield code="8">2\p</subfield><subfield code="a">cgwrk</subfield><subfield code="d">20201028</subfield><subfield code="q">DE-101</subfield><subfield code="u">https://d-nb.info/provenance/plan#cgwrk</subfield></datafield><datafield tag="943" ind1="1" ind2=" "><subfield code="a">oai:aleph.bib-bvb.de:BVB01-030225930</subfield></datafield></record></collection>
id	DE-604.BV044831066
illustrated	Not Illustrated
indexdate	2024-12-20T18:11:45Z
institution	BVB
isbn	0306475928 0792397460
language	English
oai_aleph_id	oai:aleph.bib-bvb.de:BVB01-030225930
oclc_num	70757204
open_access_boolean
physical	xxxii, 597 p.
psigel	ZDB-38-ESG
publishDate	2002
publishDateSearch	2002
publishDateSort	2002
publisher	Kluwer Academic
record_format	marc
spelling	Hachtel, Gary D. Verfasser aut Logic synthesis and verification algorithms by Gary D. Hachtel, Fabio Somenzi Boston Kluwer Academic c2002, 1996 xxxii, 597 p. txt rdacontent c rdamedia cr rdacarrier Includes bibliographical references and index Computer-aided design Integrated circuits Verification Integrated circuits Very large scale integration Design and construction Data processing Logic design Data processing Logiksynthese (DE-588)4348178-4 gnd rswk-swf Logischer Entwurf (DE-588)4168051-0 gnd rswk-swf Logischer Entwurf (DE-588)4168051-0 s 1\p DE-604 Logiksynthese (DE-588)4348178-4 s 2\p DE-604 Somenzi, Fabio Sonstige oth 1\p cgwrk 20201028 DE-101 https://d-nb.info/provenance/plan#cgwrk 2\p cgwrk 20201028 DE-101 https://d-nb.info/provenance/plan#cgwrk
spellingShingle	Hachtel, Gary D. Logic synthesis and verification algorithms Includes bibliographical references and index Computer-aided design Integrated circuits Verification Integrated circuits Very large scale integration Design and construction Data processing Logic design Data processing Logiksynthese (DE-588)4348178-4 gnd Logischer Entwurf (DE-588)4168051-0 gnd
subject_GND	(DE-588)4348178-4 (DE-588)4168051-0
title	Logic synthesis and verification algorithms
title_auth	Logic synthesis and verification algorithms
title_exact_search	Logic synthesis and verification algorithms
title_full	Logic synthesis and verification algorithms by Gary D. Hachtel, Fabio Somenzi
title_fullStr	Logic synthesis and verification algorithms by Gary D. Hachtel, Fabio Somenzi
title_full_unstemmed	Logic synthesis and verification algorithms by Gary D. Hachtel, Fabio Somenzi
title_short	Logic synthesis and verification algorithms
title_sort	logic synthesis and verification algorithms
topic	Computer-aided design Integrated circuits Verification Integrated circuits Very large scale integration Design and construction Data processing Logic design Data processing Logiksynthese (DE-588)4348178-4 gnd Logischer Entwurf (DE-588)4168051-0 gnd
topic_facet	Computer-aided design Integrated circuits Verification Integrated circuits Very large scale integration Design and construction Data processing Logic design Data processing Logiksynthese Logischer Entwurf
work_keys_str_mv	AT hachtelgaryd logicsynthesisandverificationalgorithms AT somenzifabio logicsynthesisandverificationalgorithms

Availability

MARC

Record in the Search Index

‌