Computer architecture: complexity and correctness ; with 185 tables
"Computer Architecture: Complexity and Correctness develops, at the gate level, the complete design of a pipelined RISC processor with delayed branch, forwarding, hardware interlock, precise maskable nested interrupts, caches, and a fully IEEE-compliant floating point unit. In contrast to other...
Gespeichert in:
Beteiligte Personen: | , |
---|---|
Format: | Buch |
Sprache: | Englisch |
Veröffentlicht: |
Berlin [u.a.]
Springer
[2010]
|
Schlagwörter: | |
Zusammenfassung: | "Computer Architecture: Complexity and Correctness develops, at the gate level, the complete design of a pipelined RISC processor with delayed branch, forwarding, hardware interlock, precise maskable nested interrupts, caches, and a fully IEEE-compliant floating point unit. In contrast to other design approaches applied in practice and unlike other textbooks available, the design presented here are modular, clean and complete up to the construction of entire complex machines. The authors' systematically basing their approach on rigorous mathematical formalisms allows for rigorous correctness proofs, accurate hardware costs determination, and performance evaluation as well as, generally speaking, for coverage of a broad variety of relevant issues within a reasonable number of pages. The book is written as a text for classes on computer architecture and related topics and will serve as a valuable source of reference for professionals in hardware design."--publisher's website |
Beschreibung: | Softcover reprint of hardcover 1st ed., 2000 Includes bibliographical references (p. [543]-547) and index |
Umfang: | XIII, 553 S. Ill., graph. Darst. |
ISBN: | 3642086918 9783642086915 |
Internformat
MARC
LEADER | 00000nam a2200000 c 4500 | ||
---|---|---|---|
001 | BV040607126 | ||
003 | DE-604 | ||
005 | 20130125 | ||
007 | t| | ||
008 | 121204s2010 xx ad|| |||| 00||| eng d | ||
020 | |a 3642086918 |9 3-642-08691-8 | ||
020 | |a 9783642086915 |9 978-3-642-08691-5 | ||
035 | |a (OCoLC)826543659 | ||
035 | |a (DE-599)BVBBV040607126 | ||
040 | |a DE-604 |b ger |e rakwb | ||
041 | 0 | |a eng | |
049 | |a DE-863 | ||
084 | |a ST 150 |0 (DE-625)143594: |2 rvk | ||
100 | 1 | |a Müller, Silvia Melitta |e Verfasser |4 aut | |
245 | 1 | 0 | |a Computer architecture |b complexity and correctness ; with 185 tables |c Silvia M. Mueller ; Wolfgang J. Paul |
264 | 1 | |a Berlin [u.a.] |b Springer |c [2010] | |
300 | |a XIII, 553 S. |b Ill., graph. Darst. | ||
336 | |b txt |2 rdacontent | ||
337 | |b n |2 rdamedia | ||
338 | |b nc |2 rdacarrier | ||
500 | |a Softcover reprint of hardcover 1st ed., 2000 | ||
500 | |a Includes bibliographical references (p. [543]-547) and index | ||
520 | |a "Computer Architecture: Complexity and Correctness develops, at the gate level, the complete design of a pipelined RISC processor with delayed branch, forwarding, hardware interlock, precise maskable nested interrupts, caches, and a fully IEEE-compliant floating point unit. In contrast to other design approaches applied in practice and unlike other textbooks available, the design presented here are modular, clean and complete up to the construction of entire complex machines. The authors' systematically basing their approach on rigorous mathematical formalisms allows for rigorous correctness proofs, accurate hardware costs determination, and performance evaluation as well as, generally speaking, for coverage of a broad variety of relevant issues within a reasonable number of pages. The book is written as a text for classes on computer architecture and related topics and will serve as a valuable source of reference for professionals in hardware design."--publisher's website | ||
650 | 4 | |a Computer architecture | |
650 | 0 | 7 | |a Computerarchitektur |0 (DE-588)4048717-9 |2 gnd |9 rswk-swf |
689 | 0 | 0 | |a Computerarchitektur |0 (DE-588)4048717-9 |D s |
689 | 0 | |5 DE-604 | |
700 | 1 | |a Paul, Wolfgang J. |d 1951- |e Verfasser |0 (DE-588)132287005 |4 aut | |
943 | 1 | |a oai:aleph.bib-bvb.de:BVB01-025434774 |
Datensatz im Suchindex
_version_ | 1818976856653692928 |
---|---|
any_adam_object | |
author | Müller, Silvia Melitta Paul, Wolfgang J. 1951- |
author_GND | (DE-588)132287005 |
author_facet | Müller, Silvia Melitta Paul, Wolfgang J. 1951- |
author_role | aut aut |
author_sort | Müller, Silvia Melitta |
author_variant | s m m sm smm w j p wj wjp |
building | Verbundindex |
bvnumber | BV040607126 |
classification_rvk | ST 150 |
ctrlnum | (OCoLC)826543659 (DE-599)BVBBV040607126 |
discipline | Informatik |
format | Book |
fullrecord | <?xml version="1.0" encoding="UTF-8"?><collection xmlns="http://www.loc.gov/MARC21/slim"><record><leader>02279nam a2200373 c 4500</leader><controlfield tag="001">BV040607126</controlfield><controlfield tag="003">DE-604</controlfield><controlfield tag="005">20130125 </controlfield><controlfield tag="007">t|</controlfield><controlfield tag="008">121204s2010 xx ad|| |||| 00||| eng d</controlfield><datafield tag="020" ind1=" " ind2=" "><subfield code="a">3642086918</subfield><subfield code="9">3-642-08691-8</subfield></datafield><datafield tag="020" ind1=" " ind2=" "><subfield code="a">9783642086915</subfield><subfield code="9">978-3-642-08691-5</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(OCoLC)826543659</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(DE-599)BVBBV040607126</subfield></datafield><datafield tag="040" ind1=" " ind2=" "><subfield code="a">DE-604</subfield><subfield code="b">ger</subfield><subfield code="e">rakwb</subfield></datafield><datafield tag="041" ind1="0" ind2=" "><subfield code="a">eng</subfield></datafield><datafield tag="049" ind1=" " ind2=" "><subfield code="a">DE-863</subfield></datafield><datafield tag="084" ind1=" " ind2=" "><subfield code="a">ST 150</subfield><subfield code="0">(DE-625)143594:</subfield><subfield code="2">rvk</subfield></datafield><datafield tag="100" ind1="1" ind2=" "><subfield code="a">Müller, Silvia Melitta</subfield><subfield code="e">Verfasser</subfield><subfield code="4">aut</subfield></datafield><datafield tag="245" ind1="1" ind2="0"><subfield code="a">Computer architecture</subfield><subfield code="b">complexity and correctness ; with 185 tables</subfield><subfield code="c">Silvia M. Mueller ; Wolfgang J. Paul</subfield></datafield><datafield tag="264" ind1=" " ind2="1"><subfield code="a">Berlin [u.a.]</subfield><subfield code="b">Springer</subfield><subfield code="c">[2010]</subfield></datafield><datafield tag="300" ind1=" " ind2=" "><subfield code="a">XIII, 553 S.</subfield><subfield code="b">Ill., graph. Darst.</subfield></datafield><datafield tag="336" ind1=" " ind2=" "><subfield code="b">txt</subfield><subfield code="2">rdacontent</subfield></datafield><datafield tag="337" ind1=" " ind2=" "><subfield code="b">n</subfield><subfield code="2">rdamedia</subfield></datafield><datafield tag="338" ind1=" " ind2=" "><subfield code="b">nc</subfield><subfield code="2">rdacarrier</subfield></datafield><datafield tag="500" ind1=" " ind2=" "><subfield code="a">Softcover reprint of hardcover 1st ed., 2000</subfield></datafield><datafield tag="500" ind1=" " ind2=" "><subfield code="a">Includes bibliographical references (p. [543]-547) and index</subfield></datafield><datafield tag="520" ind1=" " ind2=" "><subfield code="a">"Computer Architecture: Complexity and Correctness develops, at the gate level, the complete design of a pipelined RISC processor with delayed branch, forwarding, hardware interlock, precise maskable nested interrupts, caches, and a fully IEEE-compliant floating point unit. In contrast to other design approaches applied in practice and unlike other textbooks available, the design presented here are modular, clean and complete up to the construction of entire complex machines. The authors' systematically basing their approach on rigorous mathematical formalisms allows for rigorous correctness proofs, accurate hardware costs determination, and performance evaluation as well as, generally speaking, for coverage of a broad variety of relevant issues within a reasonable number of pages. The book is written as a text for classes on computer architecture and related topics and will serve as a valuable source of reference for professionals in hardware design."--publisher's website</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Computer architecture</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">Computerarchitektur</subfield><subfield code="0">(DE-588)4048717-9</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="689" ind1="0" ind2="0"><subfield code="a">Computerarchitektur</subfield><subfield code="0">(DE-588)4048717-9</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="0" ind2=" "><subfield code="5">DE-604</subfield></datafield><datafield tag="700" ind1="1" ind2=" "><subfield code="a">Paul, Wolfgang J.</subfield><subfield code="d">1951-</subfield><subfield code="e">Verfasser</subfield><subfield code="0">(DE-588)132287005</subfield><subfield code="4">aut</subfield></datafield><datafield tag="943" ind1="1" ind2=" "><subfield code="a">oai:aleph.bib-bvb.de:BVB01-025434774</subfield></datafield></record></collection> |
id | DE-604.BV040607126 |
illustrated | Illustrated |
indexdate | 2024-12-20T16:18:30Z |
institution | BVB |
isbn | 3642086918 9783642086915 |
language | English |
oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-025434774 |
oclc_num | 826543659 |
open_access_boolean | |
owner | DE-863 DE-BY-FWS |
owner_facet | DE-863 DE-BY-FWS |
physical | XIII, 553 S. Ill., graph. Darst. |
publishDate | 2010 |
publishDateSearch | 2010 |
publishDateSort | 2010 |
publisher | Springer |
record_format | marc |
spelling | Müller, Silvia Melitta Verfasser aut Computer architecture complexity and correctness ; with 185 tables Silvia M. Mueller ; Wolfgang J. Paul Berlin [u.a.] Springer [2010] XIII, 553 S. Ill., graph. Darst. txt rdacontent n rdamedia nc rdacarrier Softcover reprint of hardcover 1st ed., 2000 Includes bibliographical references (p. [543]-547) and index "Computer Architecture: Complexity and Correctness develops, at the gate level, the complete design of a pipelined RISC processor with delayed branch, forwarding, hardware interlock, precise maskable nested interrupts, caches, and a fully IEEE-compliant floating point unit. In contrast to other design approaches applied in practice and unlike other textbooks available, the design presented here are modular, clean and complete up to the construction of entire complex machines. The authors' systematically basing their approach on rigorous mathematical formalisms allows for rigorous correctness proofs, accurate hardware costs determination, and performance evaluation as well as, generally speaking, for coverage of a broad variety of relevant issues within a reasonable number of pages. The book is written as a text for classes on computer architecture and related topics and will serve as a valuable source of reference for professionals in hardware design."--publisher's website Computer architecture Computerarchitektur (DE-588)4048717-9 gnd rswk-swf Computerarchitektur (DE-588)4048717-9 s DE-604 Paul, Wolfgang J. 1951- Verfasser (DE-588)132287005 aut |
spellingShingle | Müller, Silvia Melitta Paul, Wolfgang J. 1951- Computer architecture complexity and correctness ; with 185 tables Computer architecture Computerarchitektur (DE-588)4048717-9 gnd |
subject_GND | (DE-588)4048717-9 |
title | Computer architecture complexity and correctness ; with 185 tables |
title_auth | Computer architecture complexity and correctness ; with 185 tables |
title_exact_search | Computer architecture complexity and correctness ; with 185 tables |
title_full | Computer architecture complexity and correctness ; with 185 tables Silvia M. Mueller ; Wolfgang J. Paul |
title_fullStr | Computer architecture complexity and correctness ; with 185 tables Silvia M. Mueller ; Wolfgang J. Paul |
title_full_unstemmed | Computer architecture complexity and correctness ; with 185 tables Silvia M. Mueller ; Wolfgang J. Paul |
title_short | Computer architecture |
title_sort | computer architecture complexity and correctness with 185 tables |
title_sub | complexity and correctness ; with 185 tables |
topic | Computer architecture Computerarchitektur (DE-588)4048717-9 gnd |
topic_facet | Computer architecture Computerarchitektur |
work_keys_str_mv | AT mullersilviamelitta computerarchitecturecomplexityandcorrectnesswith185tables AT paulwolfgangj computerarchitecturecomplexityandcorrectnesswith185tables |