A Runtime and Development Environment for FPGA Embedded Processors: Diplomarbeit an der Fakultät Informatik
Gespeichert in:
Beteilige Person: | |
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Format: | Buch |
Sprache: | Nichtbestimmte Sprache |
Veröffentlicht: |
2009
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Beschreibung: | Landshut, FH, Dipl.-Arb., Ref.: Peter Hartlmüller |
Umfang: | 68 S. graph. Darst. |
Internformat
MARC
LEADER | 00000nam a2200000 c 4500 | ||
---|---|---|---|
001 | BV035647761 | ||
003 | DE-604 | ||
005 | 00000000000000.0 | ||
007 | t| | ||
008 | 090727s2009 xx d||| |||| 00||| und d | ||
035 | |a (OCoLC)635286563 | ||
035 | |a (DE-599)BVBBV035647761 | ||
040 | |a DE-604 |b ger |e rakwb | ||
041 | |a und | ||
049 | |a DE-860 | ||
100 | 1 | |a Schreiner, Volker |e Verfasser |4 aut | |
245 | 1 | 0 | |a A Runtime and Development Environment for FPGA Embedded Processors |b Diplomarbeit an der Fakultät Informatik |c Volker Schreiner |
264 | 1 | |c 2009 | |
300 | |a 68 S. |b graph. Darst. | ||
336 | |b txt |2 rdacontent | ||
337 | |b n |2 rdamedia | ||
338 | |b nc |2 rdacarrier | ||
500 | |a Landshut, FH, Dipl.-Arb., Ref.: Peter Hartlmüller | ||
700 | 1 | |a Hartlmüller, Peter |d 1954- |e Sonstige |0 (DE-588)1062729277 |4 oth | |
943 | 1 | |a oai:aleph.bib-bvb.de:BVB01-017702421 |
Datensatz im Suchindex
_version_ | 1818966866369970176 |
---|---|
any_adam_object | |
author | Schreiner, Volker |
author_GND | (DE-588)1062729277 |
author_facet | Schreiner, Volker |
author_role | aut |
author_sort | Schreiner, Volker |
author_variant | v s vs |
building | Verbundindex |
bvnumber | BV035647761 |
ctrlnum | (OCoLC)635286563 (DE-599)BVBBV035647761 |
format | Book |
fullrecord | <?xml version="1.0" encoding="UTF-8"?><collection xmlns="http://www.loc.gov/MARC21/slim"><record><leader>00856nam a2200265 c 4500</leader><controlfield tag="001">BV035647761</controlfield><controlfield tag="003">DE-604</controlfield><controlfield tag="005">00000000000000.0</controlfield><controlfield tag="007">t|</controlfield><controlfield tag="008">090727s2009 xx d||| |||| 00||| und d</controlfield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(OCoLC)635286563</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(DE-599)BVBBV035647761</subfield></datafield><datafield tag="040" ind1=" " ind2=" "><subfield code="a">DE-604</subfield><subfield code="b">ger</subfield><subfield code="e">rakwb</subfield></datafield><datafield tag="041" ind1=" " ind2=" "><subfield code="a">und</subfield></datafield><datafield tag="049" ind1=" " ind2=" "><subfield code="a">DE-860</subfield></datafield><datafield tag="100" ind1="1" ind2=" "><subfield code="a">Schreiner, Volker</subfield><subfield code="e">Verfasser</subfield><subfield code="4">aut</subfield></datafield><datafield tag="245" ind1="1" ind2="0"><subfield code="a">A Runtime and Development Environment for FPGA Embedded Processors</subfield><subfield code="b">Diplomarbeit an der Fakultät Informatik</subfield><subfield code="c">Volker Schreiner</subfield></datafield><datafield tag="264" ind1=" " ind2="1"><subfield code="c">2009</subfield></datafield><datafield tag="300" ind1=" " ind2=" "><subfield code="a">68 S.</subfield><subfield code="b">graph. Darst.</subfield></datafield><datafield tag="336" ind1=" " ind2=" "><subfield code="b">txt</subfield><subfield code="2">rdacontent</subfield></datafield><datafield tag="337" ind1=" " ind2=" "><subfield code="b">n</subfield><subfield code="2">rdamedia</subfield></datafield><datafield tag="338" ind1=" " ind2=" "><subfield code="b">nc</subfield><subfield code="2">rdacarrier</subfield></datafield><datafield tag="500" ind1=" " ind2=" "><subfield code="a">Landshut, FH, Dipl.-Arb., Ref.: Peter Hartlmüller</subfield></datafield><datafield tag="700" ind1="1" ind2=" "><subfield code="a">Hartlmüller, Peter</subfield><subfield code="d">1954-</subfield><subfield code="e">Sonstige</subfield><subfield code="0">(DE-588)1062729277</subfield><subfield code="4">oth</subfield></datafield><datafield tag="943" ind1="1" ind2=" "><subfield code="a">oai:aleph.bib-bvb.de:BVB01-017702421</subfield></datafield></record></collection> |
id | DE-604.BV035647761 |
illustrated | Illustrated |
indexdate | 2024-12-20T13:39:42Z |
institution | BVB |
language | Undetermined |
oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-017702421 |
oclc_num | 635286563 |
open_access_boolean | |
owner | DE-860 |
owner_facet | DE-860 |
physical | 68 S. graph. Darst. |
publishDate | 2009 |
publishDateSearch | 2009 |
publishDateSort | 2009 |
record_format | marc |
spelling | Schreiner, Volker Verfasser aut A Runtime and Development Environment for FPGA Embedded Processors Diplomarbeit an der Fakultät Informatik Volker Schreiner 2009 68 S. graph. Darst. txt rdacontent n rdamedia nc rdacarrier Landshut, FH, Dipl.-Arb., Ref.: Peter Hartlmüller Hartlmüller, Peter 1954- Sonstige (DE-588)1062729277 oth |
spellingShingle | Schreiner, Volker A Runtime and Development Environment for FPGA Embedded Processors Diplomarbeit an der Fakultät Informatik |
title | A Runtime and Development Environment for FPGA Embedded Processors Diplomarbeit an der Fakultät Informatik |
title_auth | A Runtime and Development Environment for FPGA Embedded Processors Diplomarbeit an der Fakultät Informatik |
title_exact_search | A Runtime and Development Environment for FPGA Embedded Processors Diplomarbeit an der Fakultät Informatik |
title_full | A Runtime and Development Environment for FPGA Embedded Processors Diplomarbeit an der Fakultät Informatik Volker Schreiner |
title_fullStr | A Runtime and Development Environment for FPGA Embedded Processors Diplomarbeit an der Fakultät Informatik Volker Schreiner |
title_full_unstemmed | A Runtime and Development Environment for FPGA Embedded Processors Diplomarbeit an der Fakultät Informatik Volker Schreiner |
title_short | A Runtime and Development Environment for FPGA Embedded Processors |
title_sort | a runtime and development environment for fpga embedded processors diplomarbeit an der fakultat informatik |
title_sub | Diplomarbeit an der Fakultät Informatik |
work_keys_str_mv | AT schreinervolker aruntimeanddevelopmentenvironmentforfpgaembeddedprocessorsdiplomarbeitanderfakultatinformatik AT hartlmullerpeter aruntimeanddevelopmentenvironmentforfpgaembeddedprocessorsdiplomarbeitanderfakultatinformatik |