Power timing optimization for cell based digital circuits in sub micron technologies:
Gespeichert in:
| Beteiligte Personen: | , |
|---|---|
| Format: | Buch |
| Sprache: | Englisch |
| Veröffentlicht: |
Cottbus
Inst. of Computer Science
2005
|
| Schriftenreihe: | Computer science reports
[20]05,02 |
| Umfang: | 5 Bl. graph. Darst. |
Internformat
MARC
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Datensatz im Suchindex
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|---|---|
| any_adam_object | |
| author | Vierhaus, Heinrich Theodor Rossmann, Helmut |
| author_facet | Vierhaus, Heinrich Theodor Rossmann, Helmut |
| author_role | aut aut |
| author_sort | Vierhaus, Heinrich Theodor |
| author_variant | h t v ht htv h r hr |
| building | Verbundindex |
| bvnumber | BV023837693 |
| ctrlnum | (OCoLC)181515860 (DE-599)BVBBV023837693 |
| dewey-full | 621.395 |
| dewey-hundreds | 600 - Technology (Applied sciences) |
| dewey-ones | 621 - Applied physics |
| dewey-raw | 621.395 |
| dewey-search | 621.395 |
| dewey-sort | 3621.395 |
| dewey-tens | 620 - Engineering and allied operations |
| discipline | Elektrotechnik / Elektronik / Nachrichtentechnik |
| format | Book |
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| id | DE-604.BV023837693 |
| illustrated | Illustrated |
| indexdate | 2024-12-20T13:35:07Z |
| institution | BVB |
| language | English |
| oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-017479803 |
| oclc_num | 181515860 |
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| physical | 5 Bl. graph. Darst. |
| publishDate | 2005 |
| publishDateSearch | 2005 |
| publishDateSort | 2005 |
| publisher | Inst. of Computer Science |
| record_format | marc |
| series | Computer science reports |
| series2 | Computer science reports |
| spelling | Vierhaus, Heinrich Theodor Verfasser aut Power timing optimization for cell based digital circuits in sub micron technologies Heinrich Theodor Vierhaus ; Helmut Rossmann Cottbus Inst. of Computer Science 2005 5 Bl. graph. Darst. txt rdacontent n rdamedia nc rdacarrier Computer science reports [20]05,02 Rossmann, Helmut Verfasser aut Computer science reports [20]05,02 (DE-604)BV035420555 2005,2 |
| spellingShingle | Vierhaus, Heinrich Theodor Rossmann, Helmut Power timing optimization for cell based digital circuits in sub micron technologies Computer science reports |
| title | Power timing optimization for cell based digital circuits in sub micron technologies |
| title_auth | Power timing optimization for cell based digital circuits in sub micron technologies |
| title_exact_search | Power timing optimization for cell based digital circuits in sub micron technologies |
| title_full | Power timing optimization for cell based digital circuits in sub micron technologies Heinrich Theodor Vierhaus ; Helmut Rossmann |
| title_fullStr | Power timing optimization for cell based digital circuits in sub micron technologies Heinrich Theodor Vierhaus ; Helmut Rossmann |
| title_full_unstemmed | Power timing optimization for cell based digital circuits in sub micron technologies Heinrich Theodor Vierhaus ; Helmut Rossmann |
| title_short | Power timing optimization for cell based digital circuits in sub micron technologies |
| title_sort | power timing optimization for cell based digital circuits in sub micron technologies |
| volume_link | (DE-604)BV035420555 |
| work_keys_str_mv | AT vierhausheinrichtheodor powertimingoptimizationforcellbaseddigitalcircuitsinsubmicrontechnologies AT rossmannhelmut powertimingoptimizationforcellbaseddigitalcircuitsinsubmicrontechnologies |