Verfügbarkeit: Multilevel interconnect technology | Technische Universität München

Multilevel interconnect technology:

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Bibliographische Detailangaben
Beteilige Person:	Rao, Gopal K. (VerfasserIn)
Format:	Buch
Sprache:	Englisch
Veröffentlicht:	New York, NY [u.a.] MacGraw-Hill 1993
Schriftenreihe:	Intel
Schlagwörter:	VLSI Entwurf Fertigung Integrierte Schaltung
Umfang:	XV, 224 S. Ill., graph. Darst.
ISBN:	0070512248

Internformat

MARC


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Datensatz im Suchindex

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dewey-ones	621 - Applied physics
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dewey-search	621.395
dewey-sort	3621.395
dewey-tens	620 - Engineering and allied operations
discipline	Elektrotechnik / Elektronik / Nachrichtentechnik
format	Book
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id	DE-604.BV023807360
illustrated	Illustrated
indexdate	2024-12-20T13:34:34Z
institution	BVB
isbn	0070512248
language	English
oai_aleph_id	oai:aleph.bib-bvb.de:BVB01-017449530
oclc_num	831402581
open_access_boolean
owner	DE-634
owner_facet	DE-634
physical	XV, 224 S. Ill., graph. Darst.
publishDate	1993
publishDateSearch	1993
publishDateSort	1993
publisher	MacGraw-Hill
record_format	marc
series2	Intel
spelling	Rao, Gopal K. Verfasser aut Multilevel interconnect technology Gopal K. Rao New York, NY [u.a.] MacGraw-Hill 1993 XV, 224 S. Ill., graph. Darst. txt rdacontent n rdamedia nc rdacarrier Intel VLSI (DE-588)4117388-0 gnd rswk-swf Entwurf (DE-588)4121208-3 gnd rswk-swf Fertigung (DE-588)4016899-2 gnd rswk-swf Integrierte Schaltung (DE-588)4027242-4 gnd rswk-swf Integrierte Schaltung (DE-588)4027242-4 s Entwurf (DE-588)4121208-3 s VLSI (DE-588)4117388-0 s Fertigung (DE-588)4016899-2 s DE-604
spellingShingle	Rao, Gopal K. Multilevel interconnect technology VLSI (DE-588)4117388-0 gnd Entwurf (DE-588)4121208-3 gnd Fertigung (DE-588)4016899-2 gnd Integrierte Schaltung (DE-588)4027242-4 gnd
subject_GND	(DE-588)4117388-0 (DE-588)4121208-3 (DE-588)4016899-2 (DE-588)4027242-4
title	Multilevel interconnect technology
title_auth	Multilevel interconnect technology
title_exact_search	Multilevel interconnect technology
title_full	Multilevel interconnect technology Gopal K. Rao
title_fullStr	Multilevel interconnect technology Gopal K. Rao
title_full_unstemmed	Multilevel interconnect technology Gopal K. Rao
title_short	Multilevel interconnect technology
title_sort	multilevel interconnect technology
topic	VLSI (DE-588)4117388-0 gnd Entwurf (DE-588)4121208-3 gnd Fertigung (DE-588)4016899-2 gnd Integrierte Schaltung (DE-588)4027242-4 gnd
topic_facet	VLSI Entwurf Fertigung Integrierte Schaltung
work_keys_str_mv	AT raogopalk multilevelinterconnecttechnology

Verfügbarkeit

MARC

Datensatz im Suchindex

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