A Si Schottky diode demultiplexer circuit for high bit rate receivers:
Gespeichert in:
| Beteilige Person: | |
|---|---|
| Format: | Hochschulschrift/Dissertation Buch |
| Sprache: | Englisch |
| Veröffentlicht: |
Düsseldorf
VDI-Verl.
2006
|
| Ausgabe: | Als Ms. gedr. |
| Schriftenreihe: | Fortschritt-Berichte VDI
Reihe 21, Elektrotechnik ; 375 |
| Schlagwörter: | |
| Links: | http://bvbr.bib-bvb.de:8991/F?func=service&doc_library=BVB01&local_base=BVB01&doc_number=016323558&sequence=000002&line_number=0001&func_code=DB_RECORDS&service_type=MEDIA |
| Umfang: | IX, 102 S. Ill., graph. Darst. 21 cm |
| ISBN: | 3183375214 |
Internformat
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| 245 | 1 | 0 | |a A Si Schottky diode demultiplexer circuit for high bit rate receivers |c Jung Han Choi |
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| 502 | |a Zugl.: München, Techn. Univ., Diss., 2004 | ||
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Datensatz im Suchindex
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|---|---|
| adam_text | Chapter 1 Introduction •.•¦•.•.•.•.•...••..•.•..•..•.••..••...•••..•.••.•.•••••.•..•.•..•.•......••.•.•••¦•.•. 1
1.1. Introduction 1
1.2. Motivations 2
1.3. Structure of the work 3
Chapter 2 The Principle of the Si Schottky Diode Demultiplexer. 5
2.1. The Optical Receiver with Optical Preamplifier 5
2.1.1. Background 5
2.1.2. Fiber Losses and Dispersions 6
2.1.3. Optical Amplifiers (OAs) 11
2.1.4. High-speed and high-power photodetectors 13
2.2. System model for an optically preamplified direct detection receiver System 19
2.2.1. Introduction 19
2.3. Theory for the sampling circuit based demultiplexer circuit 27
2.3.1. Introduction 27
2.3.2. Theory description 28
2.4. Electrical equalizer circuit 33
2.4.1. Introduction 33
2.4.2. Model description 35
Chapter 3 Circuit Design and Simulation........ 40
3.1. Si Schottky diode modeling 40
3.1.1. The Root-diode model generation 42
3.2. Flip-chip equivalent circuit modeling 47
3.2.1. Simulation of the flip-chip bonding connection 48
3.3. The Root-diode model and the flip-chip Simulation verification 52
3.4. Design of the 43 Gbit/s demultiplexer circuit 54
3.4.1. A sampling circuit for the 43 Gbit/s MMIC demultiplexer circuit 54
3.4.2. The transversal tapped delay line filter 61
3.4.3. 43 Gbit/s hybrid demultiplexer circuit 64
3.5.86 Gbit/s MMIC 1:2 demultiplexer circuit 66
3.5.1. 86 Gbit/s MMIC 1:2 demultiplexer 66
Chapter 4 Fabrication and Measurements..................................................... 70
4.1. Coplanar waveguide measurement and analysis 70
4.1.1. Conductor-backed CPW witb via holes 71
4.1.2. Signal propagation characteristics in tfae conductor-backed CPW with via holes
73
4.2. Resistive power divider circuit design and measurement 77
4.3. Sampling circuit measurement 82
Chapter 5 Conclusion and outlook............. ...... .......................................86
Appendix A
Appendix B
References
|
| any_adam_object | 1 |
| author | Choi, Jung Han 1973- |
| author_GND | (DE-588)129553336 |
| author_facet | Choi, Jung Han 1973- |
| author_role | aut |
| author_sort | Choi, Jung Han 1973- |
| author_variant | j h c jh jhc |
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| bvnumber | BV023121087 |
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| ctrlnum | (OCoLC)890526864 (DE-599)BVBBV023121087 |
| discipline | Maschinenbau / Maschinenwesen Elektrotechnik / Elektronik / Nachrichtentechnik |
| edition | Als Ms. gedr. |
| format | Thesis Book |
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| genre_facet | Hochschulschrift |
| id | DE-604.BV023121087 |
| illustrated | Illustrated |
| indexdate | 2024-12-20T13:09:07Z |
| institution | BVB |
| isbn | 3183375214 |
| language | English |
| oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-016323558 |
| oclc_num | 890526864 |
| open_access_boolean | |
| owner | DE-210 DE-83 |
| owner_facet | DE-210 DE-83 |
| physical | IX, 102 S. Ill., graph. Darst. 21 cm |
| publishDate | 2006 |
| publishDateSearch | 2006 |
| publishDateSort | 2006 |
| publisher | VDI-Verl. |
| record_format | marc |
| series | Fortschritt-Berichte VDI |
| series2 | Fortschritt-Berichte VDI : Reihe 21, Elektrotechnik |
| spellingShingle | Choi, Jung Han 1973- A Si Schottky diode demultiplexer circuit for high bit rate receivers Fortschritt-Berichte VDI Flip-Chip-Technologie (DE-588)4427284-4 gnd Faseroptisches Bauelement (DE-588)4127953-0 gnd Photodetektor (DE-588)4136941-5 gnd Demultiplexer (DE-588)4379498-1 gnd Schottky-Diode (DE-588)4179945-8 gnd |
| subject_GND | (DE-588)4427284-4 (DE-588)4127953-0 (DE-588)4136941-5 (DE-588)4379498-1 (DE-588)4179945-8 (DE-588)4113937-9 |
| title | A Si Schottky diode demultiplexer circuit for high bit rate receivers |
| title_auth | A Si Schottky diode demultiplexer circuit for high bit rate receivers |
| title_exact_search | A Si Schottky diode demultiplexer circuit for high bit rate receivers |
| title_full | A Si Schottky diode demultiplexer circuit for high bit rate receivers Jung Han Choi |
| title_fullStr | A Si Schottky diode demultiplexer circuit for high bit rate receivers Jung Han Choi |
| title_full_unstemmed | A Si Schottky diode demultiplexer circuit for high bit rate receivers Jung Han Choi |
| title_short | A Si Schottky diode demultiplexer circuit for high bit rate receivers |
| title_sort | a si schottky diode demultiplexer circuit for high bit rate receivers |
| topic | Flip-Chip-Technologie (DE-588)4427284-4 gnd Faseroptisches Bauelement (DE-588)4127953-0 gnd Photodetektor (DE-588)4136941-5 gnd Demultiplexer (DE-588)4379498-1 gnd Schottky-Diode (DE-588)4179945-8 gnd |
| topic_facet | Flip-Chip-Technologie Faseroptisches Bauelement Photodetektor Demultiplexer Schottky-Diode Hochschulschrift |
| url | http://bvbr.bib-bvb.de:8991/F?func=service&doc_library=BVB01&local_base=BVB01&doc_number=016323558&sequence=000002&line_number=0001&func_code=DB_RECORDS&service_type=MEDIA |
| volume_link | (DE-604)BV001897864 |
| work_keys_str_mv | AT choijunghan asischottkydiodedemultiplexercircuitforhighbitratereceivers |