The FGCS computing architecture:
Gespeichert in:
| Beteilige Person: | |
|---|---|
| Format: | Buch |
| Sprache: | Englisch |
| Veröffentlicht: |
Tokyo, Japan
1989
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| Schlagwörter: | |
| Abstract: | Abstract: "In the fifth generation computer systems (FGCS) project of Japan, logic programming and parallel processing are adopted as the principles of both software and hardware system development. Their amalgamation, parallel inference systems, is being investigated at ICOT. Both hardware and software development have been carried out based on the kernel language (KL1) as the software-hardware interface. KL1 is a concurrent logic programming language extended from flat GHC. The hardware development target is a parallel inference machine (PIM) with about 10 p3 s element processors A smaller scale prototype machine, PIM/p, with about 10 p2 s processors is under development. The processors are dedicated for efficient execution of KL1 programs on a distributed implementation of the KL1 language processor. One major software project is the development of a common operating system for all the parallel inference machine named PIMOS (parallel inference machine operating system), which prototype has been working. Several program development environments have also been prepared. The Multi-PSI, another inference machine prototype, is one such powerful environment, which connects up to 64 personal sequential inference machines (PSI-II) relatively loosely Further improvements of the PIMOS, and research on various concurrent algorithms and load distribution schemes are in progress on the Multi-PSI. |
| Umfang: | 6 S. |
Internformat
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| 520 | 3 | |a Abstract: "In the fifth generation computer systems (FGCS) project of Japan, logic programming and parallel processing are adopted as the principles of both software and hardware system development. Their amalgamation, parallel inference systems, is being investigated at ICOT. Both hardware and software development have been carried out based on the kernel language (KL1) as the software-hardware interface. KL1 is a concurrent logic programming language extended from flat GHC. The hardware development target is a parallel inference machine (PIM) with about 10 p3 s element processors | |
| 520 | 3 | |a A smaller scale prototype machine, PIM/p, with about 10 p2 s processors is under development. The processors are dedicated for efficient execution of KL1 programs on a distributed implementation of the KL1 language processor. One major software project is the development of a common operating system for all the parallel inference machine named PIMOS (parallel inference machine operating system), which prototype has been working. Several program development environments have also been prepared. The Multi-PSI, another inference machine prototype, is one such powerful environment, which connects up to 64 personal sequential inference machines (PSI-II) relatively loosely | |
| 520 | 3 | |a Further improvements of the PIMOS, and research on various concurrent algorithms and load distribution schemes are in progress on the Multi-PSI. | |
| 650 | 4 | |a Fifth generation computers |z Japan | |
| 650 | 4 | |a Logic programming | |
| 650 | 4 | |a Parallel processing (Electronic computers) | |
| 943 | 1 | |a oai:aleph.bib-bvb.de:BVB01-007321371 | |
Datensatz im Suchindex
| DE-BY-TUM_call_number | 0111 2001 B 6123-460 |
|---|---|
| DE-BY-TUM_katkey | 765069 |
| DE-BY-TUM_location | 01 |
| DE-BY-TUM_media_number | 040010278401 |
| _version_ | 1821938022779715584 |
| any_adam_object | |
| author | Taki, Kazuo |
| author_facet | Taki, Kazuo |
| author_role | aut |
| author_sort | Taki, Kazuo |
| author_variant | k t kt |
| building | Verbundindex |
| bvnumber | BV010947153 |
| ctrlnum | (OCoLC)23004667 (DE-599)BVBBV010947153 |
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| id | DE-604.BV010947153 |
| illustrated | Not Illustrated |
| indexdate | 2024-12-20T10:03:37Z |
| institution | BVB |
| language | English |
| oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-007321371 |
| oclc_num | 23004667 |
| open_access_boolean | |
| owner | DE-91G DE-BY-TUM |
| owner_facet | DE-91G DE-BY-TUM |
| physical | 6 S. |
| publishDate | 1989 |
| publishDateSearch | 1989 |
| publishDateSort | 1989 |
| record_format | marc |
| spellingShingle | Taki, Kazuo The FGCS computing architecture Fifth generation computers Japan Logic programming Parallel processing (Electronic computers) |
| title | The FGCS computing architecture |
| title_auth | The FGCS computing architecture |
| title_exact_search | The FGCS computing architecture |
| title_full | The FGCS computing architecture by K. Taki |
| title_fullStr | The FGCS computing architecture by K. Taki |
| title_full_unstemmed | The FGCS computing architecture by K. Taki |
| title_short | The FGCS computing architecture |
| title_sort | the fgcs computing architecture |
| topic | Fifth generation computers Japan Logic programming Parallel processing (Electronic computers) |
| topic_facet | Fifth generation computers Japan Logic programming Parallel processing (Electronic computers) |
| work_keys_str_mv | AT takikazuo thefgcscomputingarchitecture |
Paper/Kapitel scannen lassen
Teilbibliothek Mathematik & Informatik, Berichte
| Signatur: |
0111 2001 B 6123-460 Lageplan |
|---|---|
| Exemplar 1 | Ausleihbar Am Standort |