Operation/event graphs and OESIM:
Gespeichert in:
| Beteiligte Personen: | , , |
|---|---|
| Format: | Buch |
| Sprache: | Englisch |
| Veröffentlicht: |
Seattle, Wash.
1990
|
| Schriftenreihe: | University of Washington <Seattle, Wash.> / Department of Computer Science: Technical report
90,1,17 |
| Schlagwörter: | |
| Abstract: | Abstract: "We have developed a unified internal representation for the behavior and structure of digital circuits. Behavior is defined as the union of functional and timing relationships between the inputs and outputs of a circuit while structure is the interconnected collection of physical logic and memory elements that constitute an implementation of the behavior. The representation exhibits an interesting symmetry between space (structure) and time (temporal behavior) and forms the basis for the development of high-level simulation and synthesis tools We have implemented a simulator based on this representation that checks complex temporal relationships during simulation. A variety of synthesis algorithms are being recast onto the representation so that they perform their task incrementally (via a series of graph transformations) thus enabling the design to be simulatable at all stages of the synthesis process. |
| Umfang: | 15, 43 S. |
Internformat
MARC
| LEADER | 00000nam a2200000 cb4500 | ||
|---|---|---|---|
| 001 | BV009260358 | ||
| 003 | DE-604 | ||
| 005 | 00000000000000.0 | ||
| 007 | t| | ||
| 008 | 940313s1990 xx |||| 00||| eng d | ||
| 035 | |a (OCoLC)23952562 | ||
| 035 | |a (DE-599)BVBBV009260358 | ||
| 040 | |a DE-604 |b ger |e rakddb | ||
| 041 | 0 | |a eng | |
| 049 | |a DE-29T | ||
| 100 | 1 | |a Amon, Tod |e Verfasser |4 aut | |
| 245 | 1 | 0 | |a Operation/event graphs and OESIM |c Tod Amon ; Gaetano Borriello ; Carlo Séquin |
| 264 | 1 | |a Seattle, Wash. |c 1990 | |
| 300 | |a 15, 43 S. | ||
| 336 | |b txt |2 rdacontent | ||
| 337 | |b n |2 rdamedia | ||
| 338 | |b nc |2 rdacarrier | ||
| 490 | 1 | |a University of Washington <Seattle, Wash.> / Department of Computer Science: Technical report |v 90,1,17 | |
| 520 | 3 | |a Abstract: "We have developed a unified internal representation for the behavior and structure of digital circuits. Behavior is defined as the union of functional and timing relationships between the inputs and outputs of a circuit while structure is the interconnected collection of physical logic and memory elements that constitute an implementation of the behavior. The representation exhibits an interesting symmetry between space (structure) and time (temporal behavior) and forms the basis for the development of high-level simulation and synthesis tools | |
| 520 | 3 | |a We have implemented a simulator based on this representation that checks complex temporal relationships during simulation. A variety of synthesis algorithms are being recast onto the representation so that they perform their task incrementally (via a series of graph transformations) thus enabling the design to be simulatable at all stages of the synthesis process. | |
| 650 | 4 | |a Electronic circuits | |
| 700 | 1 | |a Borriello, Gaetano |e Verfasser |4 aut | |
| 700 | 1 | |a Séquin, Carlo |e Verfasser |4 aut | |
| 810 | 2 | |a Department of Computer Science: Technical report |t University of Washington <Seattle, Wash.> |v 90,1,17 |w (DE-604)BV008930431 |9 90,1,17 | |
| 943 | 1 | |a oai:aleph.bib-bvb.de:BVB01-006162234 | |
Datensatz im Suchindex
| _version_ | 1818951485783801856 |
|---|---|
| any_adam_object | |
| author | Amon, Tod Borriello, Gaetano Séquin, Carlo |
| author_facet | Amon, Tod Borriello, Gaetano Séquin, Carlo |
| author_role | aut aut aut |
| author_sort | Amon, Tod |
| author_variant | t a ta g b gb c s cs |
| building | Verbundindex |
| bvnumber | BV009260358 |
| ctrlnum | (OCoLC)23952562 (DE-599)BVBBV009260358 |
| format | Book |
| fullrecord | <?xml version="1.0" encoding="UTF-8"?><collection xmlns="http://www.loc.gov/MARC21/slim"><record><leader>02019nam a2200325 cb4500</leader><controlfield tag="001">BV009260358</controlfield><controlfield tag="003">DE-604</controlfield><controlfield tag="005">00000000000000.0</controlfield><controlfield tag="007">t|</controlfield><controlfield tag="008">940313s1990 xx |||| 00||| eng d</controlfield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(OCoLC)23952562</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(DE-599)BVBBV009260358</subfield></datafield><datafield tag="040" ind1=" " ind2=" "><subfield code="a">DE-604</subfield><subfield code="b">ger</subfield><subfield code="e">rakddb</subfield></datafield><datafield tag="041" ind1="0" ind2=" "><subfield code="a">eng</subfield></datafield><datafield tag="049" ind1=" " ind2=" "><subfield code="a">DE-29T</subfield></datafield><datafield tag="100" ind1="1" ind2=" "><subfield code="a">Amon, Tod</subfield><subfield code="e">Verfasser</subfield><subfield code="4">aut</subfield></datafield><datafield tag="245" ind1="1" ind2="0"><subfield code="a">Operation/event graphs and OESIM</subfield><subfield code="c">Tod Amon ; Gaetano Borriello ; Carlo Séquin</subfield></datafield><datafield tag="264" ind1=" " ind2="1"><subfield code="a">Seattle, Wash.</subfield><subfield code="c">1990</subfield></datafield><datafield tag="300" ind1=" " ind2=" "><subfield code="a">15, 43 S.</subfield></datafield><datafield tag="336" ind1=" " ind2=" "><subfield code="b">txt</subfield><subfield code="2">rdacontent</subfield></datafield><datafield tag="337" ind1=" " ind2=" "><subfield code="b">n</subfield><subfield code="2">rdamedia</subfield></datafield><datafield tag="338" ind1=" " ind2=" "><subfield code="b">nc</subfield><subfield code="2">rdacarrier</subfield></datafield><datafield tag="490" ind1="1" ind2=" "><subfield code="a">University of Washington <Seattle, Wash.> / Department of Computer Science: Technical report</subfield><subfield code="v">90,1,17</subfield></datafield><datafield tag="520" ind1="3" ind2=" "><subfield code="a">Abstract: "We have developed a unified internal representation for the behavior and structure of digital circuits. Behavior is defined as the union of functional and timing relationships between the inputs and outputs of a circuit while structure is the interconnected collection of physical logic and memory elements that constitute an implementation of the behavior. The representation exhibits an interesting symmetry between space (structure) and time (temporal behavior) and forms the basis for the development of high-level simulation and synthesis tools</subfield></datafield><datafield tag="520" ind1="3" ind2=" "><subfield code="a">We have implemented a simulator based on this representation that checks complex temporal relationships during simulation. A variety of synthesis algorithms are being recast onto the representation so that they perform their task incrementally (via a series of graph transformations) thus enabling the design to be simulatable at all stages of the synthesis process.</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Electronic circuits</subfield></datafield><datafield tag="700" ind1="1" ind2=" "><subfield code="a">Borriello, Gaetano</subfield><subfield code="e">Verfasser</subfield><subfield code="4">aut</subfield></datafield><datafield tag="700" ind1="1" ind2=" "><subfield code="a">Séquin, Carlo</subfield><subfield code="e">Verfasser</subfield><subfield code="4">aut</subfield></datafield><datafield tag="810" ind1="2" ind2=" "><subfield code="a">Department of Computer Science: Technical report</subfield><subfield code="t">University of Washington <Seattle, Wash.></subfield><subfield code="v">90,1,17</subfield><subfield code="w">(DE-604)BV008930431</subfield><subfield code="9">90,1,17</subfield></datafield><datafield tag="943" ind1="1" ind2=" "><subfield code="a">oai:aleph.bib-bvb.de:BVB01-006162234</subfield></datafield></record></collection> |
| id | DE-604.BV009260358 |
| illustrated | Not Illustrated |
| indexdate | 2024-12-20T09:35:14Z |
| institution | BVB |
| language | English |
| oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-006162234 |
| oclc_num | 23952562 |
| open_access_boolean | |
| owner | DE-29T |
| owner_facet | DE-29T |
| physical | 15, 43 S. |
| publishDate | 1990 |
| publishDateSearch | 1990 |
| publishDateSort | 1990 |
| record_format | marc |
| series2 | University of Washington <Seattle, Wash.> / Department of Computer Science: Technical report |
| spelling | Amon, Tod Verfasser aut Operation/event graphs and OESIM Tod Amon ; Gaetano Borriello ; Carlo Séquin Seattle, Wash. 1990 15, 43 S. txt rdacontent n rdamedia nc rdacarrier University of Washington <Seattle, Wash.> / Department of Computer Science: Technical report 90,1,17 Abstract: "We have developed a unified internal representation for the behavior and structure of digital circuits. Behavior is defined as the union of functional and timing relationships between the inputs and outputs of a circuit while structure is the interconnected collection of physical logic and memory elements that constitute an implementation of the behavior. The representation exhibits an interesting symmetry between space (structure) and time (temporal behavior) and forms the basis for the development of high-level simulation and synthesis tools We have implemented a simulator based on this representation that checks complex temporal relationships during simulation. A variety of synthesis algorithms are being recast onto the representation so that they perform their task incrementally (via a series of graph transformations) thus enabling the design to be simulatable at all stages of the synthesis process. Electronic circuits Borriello, Gaetano Verfasser aut Séquin, Carlo Verfasser aut Department of Computer Science: Technical report University of Washington <Seattle, Wash.> 90,1,17 (DE-604)BV008930431 90,1,17 |
| spellingShingle | Amon, Tod Borriello, Gaetano Séquin, Carlo Operation/event graphs and OESIM Electronic circuits |
| title | Operation/event graphs and OESIM |
| title_auth | Operation/event graphs and OESIM |
| title_exact_search | Operation/event graphs and OESIM |
| title_full | Operation/event graphs and OESIM Tod Amon ; Gaetano Borriello ; Carlo Séquin |
| title_fullStr | Operation/event graphs and OESIM Tod Amon ; Gaetano Borriello ; Carlo Séquin |
| title_full_unstemmed | Operation/event graphs and OESIM Tod Amon ; Gaetano Borriello ; Carlo Séquin |
| title_short | Operation/event graphs and OESIM |
| title_sort | operation event graphs and oesim |
| topic | Electronic circuits |
| topic_facet | Electronic circuits |
| volume_link | (DE-604)BV008930431 |
| work_keys_str_mv | AT amontod operationeventgraphsandoesim AT borriellogaetano operationeventgraphsandoesim AT sequincarlo operationeventgraphsandoesim |