The design and analysis of instruction set processors:
Gespeichert in:
| Beteiligte Personen: | , |
|---|---|
| Format: | Buch |
| Sprache: | Englisch |
| Veröffentlicht: |
New York (u.a.)
McGraw-Hill
1982
|
| Schriftenreihe: | McGraw-Hill computer science series.
|
| Schlagwörter: | |
| Umfang: | XVII, 243 S. |
| ISBN: | 0070573034 |
Internformat
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| 245 | 1 | 0 | |a The design and analysis of instruction set processors |c Mario Barbacci ; Daniel P. Siewiorek* |
| 264 | 1 | |a New York (u.a.) |b McGraw-Hill |c 1982 | |
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Datensatz im Suchindex
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|---|---|
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| DE-BY-TUM_location | 01 |
| DE-BY-TUM_media_number | 040010646601 |
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| any_adam_object | |
| author | Barbacci, Mario Siewiorek, Daniel P. |
| author_facet | Barbacci, Mario Siewiorek, Daniel P. |
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| dewey-search | 621.3819/52 001.64 |
| dewey-sort | 3621.3819 252 |
| dewey-tens | 620 - Engineering and allied operations 000 - Computer science, information, general works |
| discipline | Allgemeines Informatik Elektrotechnik / Elektronik / Nachrichtentechnik |
| format | Book |
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| id | DE-604.BV002011536 |
| illustrated | Not Illustrated |
| indexdate | 2024-12-20T07:44:42Z |
| institution | BVB |
| isbn | 0070573034 |
| language | English |
| oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-001312797 |
| oclc_num | 8115038 |
| open_access_boolean | |
| owner | DE-91G DE-BY-TUM DE-384 DE-739 |
| owner_facet | DE-91G DE-BY-TUM DE-384 DE-739 |
| physical | XVII, 243 S. |
| publishDate | 1982 |
| publishDateSearch | 1982 |
| publishDateSort | 1982 |
| publisher | McGraw-Hill |
| record_format | marc |
| series2 | McGraw-Hill computer science series. |
| spellingShingle | Barbacci, Mario Siewiorek, Daniel P. The design and analysis of instruction set processors ISP inriac architecture ordinateur inriac Computer architecture ISP (Computer program language) Computerarchitektur (DE-588)4048717-9 gnd |
| subject_GND | (DE-588)4048717-9 |
| title | The design and analysis of instruction set processors |
| title_auth | The design and analysis of instruction set processors |
| title_exact_search | The design and analysis of instruction set processors |
| title_full | The design and analysis of instruction set processors Mario Barbacci ; Daniel P. Siewiorek* |
| title_fullStr | The design and analysis of instruction set processors Mario Barbacci ; Daniel P. Siewiorek* |
| title_full_unstemmed | The design and analysis of instruction set processors Mario Barbacci ; Daniel P. Siewiorek* |
| title_short | The design and analysis of instruction set processors |
| title_sort | the design and analysis of instruction set processors |
| topic | ISP inriac architecture ordinateur inriac Computer architecture ISP (Computer program language) Computerarchitektur (DE-588)4048717-9 gnd |
| topic_facet | ISP architecture ordinateur Computer architecture ISP (Computer program language) Computerarchitektur |
| work_keys_str_mv | AT barbaccimario thedesignandanalysisofinstructionsetprocessors AT siewiorekdanielp thedesignandanalysisofinstructionsetprocessors |
Paper/Kapitel scannen lassen
Teilbibliothek Mathematik & Informatik
| Signatur: |
0102 DAT 210f 2001 B 1286
Lageplan |
|---|---|
| Exemplar 1 | Ausleihbar Am Standort |