Design and Analysis of High Efficiency Line Drivers for xDSL:
Design and Analysis of High Efficiency Line Drivers for xDSL covers the most important building block of an xDSL (ADSL, VDSL, ...) system: the line driver. Traditional Class AB line drivers consume more than 70% of the total power budget of state-of-the-art ADSL modems. This book describes the main...
Gespeichert in:
| Beteiligte Personen: | , |
|---|---|
| Format: | Elektronisch E-Book |
| Sprache: | Englisch |
| Veröffentlicht: |
Boston, MA
Springer US
2004
|
| Schriftenreihe: | The International Series in Engineering and Computer Science
759 |
| Schlagwörter: | |
| Links: | https://doi.org/10.1007/b105290 https://doi.org/10.1007/b105290 https://doi.org/10.1007/b105290 |
| Zusammenfassung: | Design and Analysis of High Efficiency Line Drivers for xDSL covers the most important building block of an xDSL (ADSL, VDSL, ...) system: the line driver. Traditional Class AB line drivers consume more than 70% of the total power budget of state-of-the-art ADSL modems. This book describes the main difficulties in designing line drivers for xDSL. The most important specifications are elaborated staring from the main properties of the channel and the signal properties. The traditional (class AB), state-of-the-art (class G) and future technologies (class K) are discussed. The main part of Design and Analysis of High Efficiency Line Drivers for xDSL describes the design of a novel architecture: the Self-Oscillating Power Amplifier or SOPA. |
| Umfang: | 1 Online-Ressource (XXII, 235 p) |
| ISBN: | 9781402025181 |
| DOI: | 10.1007/b105290 |
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Datensatz im Suchindex
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| author | Piessens, Tim Steyaert, Michiel |
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| dewey-full | 621.3815 |
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| dewey-raw | 621.3815 |
| dewey-search | 621.3815 |
| dewey-sort | 3621.3815 |
| dewey-tens | 620 - Engineering and allied operations |
| discipline | Informatik Elektrotechnik / Elektronik / Nachrichtentechnik |
| doi_str_mv | 10.1007/b105290 |
| format | Electronic eBook |
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| id | DE-604.BV045148629 |
| illustrated | Not Illustrated |
| indexdate | 2024-12-20T18:19:18Z |
| institution | BVB |
| isbn | 9781402025181 |
| language | English |
| oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-030538328 |
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| physical | 1 Online-Ressource (XXII, 235 p) |
| psigel | ZDB-2-ENG ZDB-2-ENG_2000/2004 ZDB-2-ENG ZDB-2-ENG_2000/2004 ZDB-2-ENG ZDB-2-ENG_Archiv |
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| series2 | The International Series in Engineering and Computer Science |
| spelling | Piessens, Tim Verfasser aut Design and Analysis of High Efficiency Line Drivers for xDSL by Tim Piessens, Michiel Steyaert Boston, MA Springer US 2004 1 Online-Ressource (XXII, 235 p) txt rdacontent c rdamedia cr rdacarrier The International Series in Engineering and Computer Science 759 Design and Analysis of High Efficiency Line Drivers for xDSL covers the most important building block of an xDSL (ADSL, VDSL, ...) system: the line driver. Traditional Class AB line drivers consume more than 70% of the total power budget of state-of-the-art ADSL modems. This book describes the main difficulties in designing line drivers for xDSL. The most important specifications are elaborated staring from the main properties of the channel and the signal properties. The traditional (class AB), state-of-the-art (class G) and future technologies (class K) are discussed. The main part of Design and Analysis of High Efficiency Line Drivers for xDSL describes the design of a novel architecture: the Self-Oscillating Power Amplifier or SOPA. Engineering Circuits and Systems Electrical Engineering Electrical engineering Electronic circuits DSL (DE-588)4539464-7 gnd rswk-swf Entwurf (DE-588)4121208-3 gnd rswk-swf Treiberschaltung (DE-588)4272299-8 gnd rswk-swf DSL (DE-588)4539464-7 s Treiberschaltung (DE-588)4272299-8 s Entwurf (DE-588)4121208-3 s 1\p DE-604 Steyaert, Michiel aut Erscheint auch als Druck-Ausgabe 9781402077272 https://doi.org/10.1007/b105290 Verlag URL des Erstveröffentlichers Volltext 1\p cgwrk 20201028 DE-101 https://d-nb.info/provenance/plan#cgwrk |
| spellingShingle | Piessens, Tim Steyaert, Michiel Design and Analysis of High Efficiency Line Drivers for xDSL Engineering Circuits and Systems Electrical Engineering Electrical engineering Electronic circuits DSL (DE-588)4539464-7 gnd Entwurf (DE-588)4121208-3 gnd Treiberschaltung (DE-588)4272299-8 gnd |
| subject_GND | (DE-588)4539464-7 (DE-588)4121208-3 (DE-588)4272299-8 |
| title | Design and Analysis of High Efficiency Line Drivers for xDSL |
| title_auth | Design and Analysis of High Efficiency Line Drivers for xDSL |
| title_exact_search | Design and Analysis of High Efficiency Line Drivers for xDSL |
| title_full | Design and Analysis of High Efficiency Line Drivers for xDSL by Tim Piessens, Michiel Steyaert |
| title_fullStr | Design and Analysis of High Efficiency Line Drivers for xDSL by Tim Piessens, Michiel Steyaert |
| title_full_unstemmed | Design and Analysis of High Efficiency Line Drivers for xDSL by Tim Piessens, Michiel Steyaert |
| title_short | Design and Analysis of High Efficiency Line Drivers for xDSL |
| title_sort | design and analysis of high efficiency line drivers for xdsl |
| topic | Engineering Circuits and Systems Electrical Engineering Electrical engineering Electronic circuits DSL (DE-588)4539464-7 gnd Entwurf (DE-588)4121208-3 gnd Treiberschaltung (DE-588)4272299-8 gnd |
| topic_facet | Engineering Circuits and Systems Electrical Engineering Electrical engineering Electronic circuits DSL Entwurf Treiberschaltung |
| url | https://doi.org/10.1007/b105290 |
| work_keys_str_mv | AT piessenstim designandanalysisofhighefficiencylinedriversforxdsl AT steyaertmichiel designandanalysisofhighefficiencylinedriversforxdsl |