Electronic Design Automation for IC Implementation, Circuit Design, and Process Technology: Circuit Design, and Process Technology, Second Edition
Gespeichert in:
Beteilige Person: | |
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Format: | Elektronisch E-Book |
Sprache: | Englisch |
Veröffentlicht: |
Boca Raton
CRC Press
2016
|
Ausgabe: | second edition |
Schlagwörter: | |
Links: | https://ebookcentral.proquest.com/lib/fhws/detail.action?docID=4514294 https://ebookcentral.proquest.com/lib/fhws/detail.action?docID=4514294 |
Beschreibung: | Description based upon print version of record |
Umfang: | 1 Online-Ressource (908 pages) |
ISBN: | 9781482254617 |
Internformat
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338 | |b cr |2 rdacarrier | ||
500 | |a Description based upon print version of record | ||
520 | 1 | |a Front Cover -- Contents -- Preface to the Second Edition -- Preface to the First Edition -- Acknowledgments -- Editors -- Contributors -- I: RTL to GDSII, or Synthesis, Place, and Route -- 1: Design Flows -- 2: Logic Synthesis -- 3: Power Analysis and Optimization from Circuit to Register-Transfer Levels -- 4: Equivalence Checking -- 5: Digital Layout: Placement -- 6: Static Timing Analysis -- 7: Structured Digital Design -- 8: Routing -- 9: Physical Design for 3D ICs -- 10: Gate Sizing -- 11: Clock Design and Synthesis -- 12: Exploring Challenges of Libraries for Electronic Design | |
520 | 1 | |a 13: Design Closure -- 14: Tools for Chip-Package Co-Design -- 15: Design Databases -- 16: FPGA Synthesis and Physical Design -- II: Analog and Mixed-Signal Design -- 17: Simulation of Analog and RF Circuits and Systems -- 18: Simulation and Modeling for Analog and Mixed-Signal Integrated Circuits -- 19: Layout Tools for Analog Integrated Circuits and Mixed-Signal Systems-on-Chip: A Survey -- III: Physical Verification -- 20: Design Rule Checking -- 21: Resolution Enhancement Techniques and Mask Data Preparation -- 22: Design for Manufacturability in the Nanometer Era | |
520 | 1 | |a 23: Design and Analysis of Power Supply Networks -- 24: Noise in Digital ICs -- 25: Layout Extraction -- 26: Mixed-Signal Noise Coupling in System-on-Chip Design: Modeling, Analysis, and Validation -- IV: Technology Computer-Aided Design -- 27: Process Simulation -- 28: Device Modeling: From Physics to Electrical Parameter Extraction -- 29: High-Accuracy Parasitic Extraction -- Back Cover | |
650 | 0 | 7 | |a CAD |0 (DE-588)4069794-0 |2 gnd |9 rswk-swf |
650 | 0 | 7 | |a Integrierte Schaltung |0 (DE-588)4027242-4 |2 gnd |9 rswk-swf |
653 | |a Electronic books | ||
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689 | 0 | 1 | |a CAD |0 (DE-588)4069794-0 |D s |
689 | 0 | |5 DE-604 | |
700 | 1 | |a Markov, Igor L. |d 1973- |e Sonstige |0 (DE-588)137299354 |4 oth | |
700 | 1 | |a Martin, Grant |e Sonstige |4 oth | |
700 | 1 | |a Scheffer, Louis K. |e Sonstige |4 oth | |
776 | 0 | 8 | |i Erscheint auch als |n Druck-Ausgabe |z 978-1-4822-5461-7 |
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Datensatz im Suchindex
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---|---|
any_adam_object | |
author | Lavagno, Luciano 1959- |
author_GND | (DE-588)172602955 (DE-588)137299354 |
author_facet | Lavagno, Luciano 1959- |
author_role | aut |
author_sort | Lavagno, Luciano 1959- |
author_variant | l l ll |
building | Verbundindex |
bvnumber | BV044508402 |
classification_rvk | ZN 4904 |
collection | ZDB-30-PQE |
ctrlnum | (OCoLC)1005714698 (DE-599)GBV859381412 |
discipline | Elektrotechnik / Elektronik / Nachrichtentechnik |
edition | second edition |
format | Electronic eBook |
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id | DE-604.BV044508402 |
illustrated | Not Illustrated |
indexdate | 2024-12-20T18:04:41Z |
institution | BVB |
isbn | 9781482254617 |
language | English |
oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-029908247 |
oclc_num | 1005714698 |
open_access_boolean | |
owner | DE-862 DE-BY-FWS DE-863 DE-BY-FWS |
owner_facet | DE-862 DE-BY-FWS DE-863 DE-BY-FWS |
physical | 1 Online-Ressource (908 pages) |
psigel | ZDB-30-PQE |
publishDate | 2016 |
publishDateSearch | 2016 |
publishDateSort | 2016 |
publisher | CRC Press |
record_format | marc |
spelling | Lavagno, Luciano 1959- Verfasser (DE-588)172602955 aut Electronic Design Automation for IC Implementation, Circuit Design, and Process Technology Circuit Design, and Process Technology, Second Edition second edition Boca Raton CRC Press 2016 1 Online-Ressource (908 pages) txt rdacontent c rdamedia cr rdacarrier Description based upon print version of record Front Cover -- Contents -- Preface to the Second Edition -- Preface to the First Edition -- Acknowledgments -- Editors -- Contributors -- I: RTL to GDSII, or Synthesis, Place, and Route -- 1: Design Flows -- 2: Logic Synthesis -- 3: Power Analysis and Optimization from Circuit to Register-Transfer Levels -- 4: Equivalence Checking -- 5: Digital Layout: Placement -- 6: Static Timing Analysis -- 7: Structured Digital Design -- 8: Routing -- 9: Physical Design for 3D ICs -- 10: Gate Sizing -- 11: Clock Design and Synthesis -- 12: Exploring Challenges of Libraries for Electronic Design 13: Design Closure -- 14: Tools for Chip-Package Co-Design -- 15: Design Databases -- 16: FPGA Synthesis and Physical Design -- II: Analog and Mixed-Signal Design -- 17: Simulation of Analog and RF Circuits and Systems -- 18: Simulation and Modeling for Analog and Mixed-Signal Integrated Circuits -- 19: Layout Tools for Analog Integrated Circuits and Mixed-Signal Systems-on-Chip: A Survey -- III: Physical Verification -- 20: Design Rule Checking -- 21: Resolution Enhancement Techniques and Mask Data Preparation -- 22: Design for Manufacturability in the Nanometer Era 23: Design and Analysis of Power Supply Networks -- 24: Noise in Digital ICs -- 25: Layout Extraction -- 26: Mixed-Signal Noise Coupling in System-on-Chip Design: Modeling, Analysis, and Validation -- IV: Technology Computer-Aided Design -- 27: Process Simulation -- 28: Device Modeling: From Physics to Electrical Parameter Extraction -- 29: High-Accuracy Parasitic Extraction -- Back Cover CAD (DE-588)4069794-0 gnd rswk-swf Integrierte Schaltung (DE-588)4027242-4 gnd rswk-swf Electronic books Integrierte Schaltung (DE-588)4027242-4 s CAD (DE-588)4069794-0 s DE-604 Markov, Igor L. 1973- Sonstige (DE-588)137299354 oth Martin, Grant Sonstige oth Scheffer, Louis K. Sonstige oth Erscheint auch als Druck-Ausgabe 978-1-4822-5461-7 |
spellingShingle | Lavagno, Luciano 1959- Electronic Design Automation for IC Implementation, Circuit Design, and Process Technology Circuit Design, and Process Technology, Second Edition CAD (DE-588)4069794-0 gnd Integrierte Schaltung (DE-588)4027242-4 gnd |
subject_GND | (DE-588)4069794-0 (DE-588)4027242-4 |
title | Electronic Design Automation for IC Implementation, Circuit Design, and Process Technology Circuit Design, and Process Technology, Second Edition |
title_auth | Electronic Design Automation for IC Implementation, Circuit Design, and Process Technology Circuit Design, and Process Technology, Second Edition |
title_exact_search | Electronic Design Automation for IC Implementation, Circuit Design, and Process Technology Circuit Design, and Process Technology, Second Edition |
title_full | Electronic Design Automation for IC Implementation, Circuit Design, and Process Technology Circuit Design, and Process Technology, Second Edition |
title_fullStr | Electronic Design Automation for IC Implementation, Circuit Design, and Process Technology Circuit Design, and Process Technology, Second Edition |
title_full_unstemmed | Electronic Design Automation for IC Implementation, Circuit Design, and Process Technology Circuit Design, and Process Technology, Second Edition |
title_short | Electronic Design Automation for IC Implementation, Circuit Design, and Process Technology |
title_sort | electronic design automation for ic implementation circuit design and process technology circuit design and process technology second edition |
title_sub | Circuit Design, and Process Technology, Second Edition |
topic | CAD (DE-588)4069794-0 gnd Integrierte Schaltung (DE-588)4027242-4 gnd |
topic_facet | CAD Integrierte Schaltung |
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