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Grundlagen der Technischen Informatik: 57 Tabellen

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Bibliographic Details
Main Author:	Hoffmann, Dirk W. 1972- (Author)
Format:	Book
Language:	German
Published:	München Hanser [2016]
Edition:	5., aktualisierte Auflage
Subjects:	Technische Informatik Boolesche Algebra Digitaltechnik Halbleitertechnik Hardware Rechnerentwurf Rechnerorganisation Zahlendarstellung Lehrbuch
Links:	http://bvbr.bib-bvb.de:8991/F?func=service&doc_library=BVB01&local_base=BVB01&doc_number=029164386&sequence=000001&line_number=0001&func_code=DB_RECORDS&service_type=MEDIA
Item Description:	Im Internet: Lösungen zu den Übungsaufgaben, Übungsblätter und weiteres Zusatzmaterial
Physical Description:	447 Seiten Illustrationen, Diagramme
ISBN:	3446448675 9783446448674

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adam_text	INHALTSVERZEICHNIS 1 EINFUEHRUNG 11 1.1 WAS IST TECHNISCHE IN FO RM ATIK ?................................................................................................................ 11 1.2 VOM ABAKUS ZUM SUPERCOMPUTER............................................................................................................. 13 1.3 WOHIN GEHT DIE R EISE?................................................................................................................................ 30 2 HALBLEITERTECHNIK 33 2.1 H A LB LE ITE R.................................................................................................................................................. 34 2.1.1 ATOMMODELL VON B O H R................................................................................................................ 34 2.1.2 REINE H ALBLEITER......................................................................................................................... 37 2.1.3 DOTIERTE H ALBLEITER...................................................................................................................... 39 2.2 INTEGRIERTE SCHALTELEMENTE......................................................................................................................... 41 2.2.1 HALBLEITERDIODEN......................................................................................................................... 41 2.2.2 BIPOLARTRANSISTOREN...................................................................................................................... 42 2.2.3 FELDEFFEKTTRANSISTOREN................................................................................................................ 46 2.3 CHIP-FERTIGUNG ......................................................................................................................................... 51 2.3.1 PRODUKTION INTEGRIERTER SCHALTKREISE.......................................................................................... 51 2.3.2 INTEGRATIONSDICHTE...................................................................................................................... 57 2.4 UEBUNGSAUFGABEN......................................................................................................................................... 58 3 ZAHLENDARSTELLUNG UND CODES 59 3.1 ZAHLENSYSTEME............................................................................................................................................ 60 3.2 RECHNERINTEME Z AHLENFORM ATE................................................................................................................ 67 3.2.1 DARSTELLUNG NATUERLICHER ZAHLEN ................................................................................................ 67 3.2.2 DARSTELLUNG RATIONALER Z A H LE N .................................................................................................... 73 3.3 Z AHLENCODES............................................................................................................................................... 80 3.3.1 T ETRADEN-C ODES......................................................................................................................... 80 3.3.2 FEHLERERKENNENDE C ODES ......................... - ................................................................................. 84 3.4 UEBUNGSAUFGABEN......................................................................................................................................... 86 4 BOOLESCHE ALGEBRA 89 4.1 AXIOMATISIERUNG NACH HUNTINGTON .......................................................................................................... 90 4.1.1 MENGENALGEBRA ......................................................................................................................... 91 4.1.2 SCHALTALGEBRA............................................................................................................................... 93 4.2 BOOLESCHE AUSDRUECKE UND A U SSA G E N ....................................................................................................... 95 4.2.1 ABGELEITETE O P E RATO RE N ............................................................................................................. 97 4.2.2 ERFUELLBARKEIT UND AE QUIVALENZ...................................................................................................... 100 4.2.3 STRUKTURELLE INDUKTION...................................................................................................................102 4.2.4 D UALITAETSPRINZIP............................................................................................................................ 105 4.3 RECHNEN IN BOOLESCHEN A LG E B RE N .................................................................................................................. 109 4.3.1 ABGELEITETE UMFORMUNGSREGELN..................................................................................................... 109 4.3.2 VEREINFACHUNG BOOLESCHER A USDRUECKE............................................................................................111 4.3.3 VOLLSTAENDIGE OPERATORENSYSTEME..................................................................................................... 117 4.4 NORMALFORMDARSTELLUNGEN...............................................................................................................................119 4.4.1 KONJUNKTIVE UND DISJUNKTIVE NORM ALFORM ...................................................................................... 119 4.4.2 REED-MULLER-NORMALFORM...............................................................................................................122 4.4.3 BINAERE ENTSCHEIDUNGSDIAGRAMME.................................................................................................. 125 4.5 UEBUNGSAUFGABEN.............................................................................................................................................. 133 5 SCHALTNETZE 139 5.1 GRUNDLAGEN DER D IG ITALTE CH N IK ..................................................................................................................... 140 5.1.1 SCHALTKREISFAMILIEN ........................................................................................................................ 140 5.1.2 MOS-SCHALTUNGSTECHNIK..................................................................................................................145 5.1.3 L ASTFAKTOREN.....................................................................................................................................155 5.2 SCHALTUNGSSYNTHESE........................................................................................................................................ 156 5.2.1 ZWEISTUFIGE SCHALTUNGSSYNTHESE..................................................................................................... 157 5.2.2 BDD-BASIERTE SCHALTUNGSSYNTHESE.................................................................................................. 158 5.2.3 FDD-BASIERTE SCHALTUNGSSYNTHESE.................................................................................................. 159 5.3 F ORM ELSYNTHESE.............................................................................................................................................. 161 5.3.1 FUNKTIONALE FORMELSYNTHESE............................................................................................................161 5.3.2 RELATIONALE FORM ELSYNTHESE............................................................................................................163 5.3.3 DEFINITORISCHE FORMELSYNTHESE ..................................................................................................... 164 5.4 KOMPLEXITAETSANALYSE........................................................................................................................................ 167 5.5 ZEITVERHALTEN DIGITALER SCHALTUNGEN...............................................................................................................169 5.5.1 SIGNALAUSBREITUNG UND-V ERZOEGERUNG............................................................................................169 5.5.2 S TOE RIM P U LSE .....................................................................................................................................171 5.6 UEBUNGSAUFGABEN.............................................................................................................................................. 175 6 MINIMIERUNG 181 6.1 MINIMIERUNGSZIELE........................................................................................................................................... 182 6.2 KAMAUGH-VEITCH-DIAGRAMME........................................................................................................................ 186 6.2.1 MINIMIERUNG PARTIELL DEFINIERTER FUNKTIONEN ............................................................................... 190 6.2.2 KONSTRUKTION HAZARD-FREIER S C H A LTU N G E N ..................................................................................... 194 6.2.3 MINIMIERUNG MEHRSTELLIGER FUNKTIONEN.........................................................................................196 6.3 QUINE-MCCLUSKEY-VERFAHREN........................................................................................................................ 197 6.4 UEBUNGSAUFGABEN.............................................................................................................................................. 201 7 STANDARDSCHALTNETZE 205 7.1 M OTIVATION....................................................................................................................................................... 206 7.2 MULTIPLEXER UND D EM ULTIPLEXER.....................................................................................................................206 7.3 K OM PARATOREN................................................................................................................................................. 213 7.4 PRAEFIX-LOGIK.................................................................................................................................................... 215 7.5 A D D IE RE R.......................................................................................................................................................... 218 7.5.1 HALB- UND VOLLADDIERER.................................................................................................................... 218 7.5.2 CARRY-RIPPLE-ADDIERER.................................................................................................................... 220 7.5.3 CARRY-LOOK-AHEAD-ADDIERER........................................................................................................... 221 7.5.4 CONDITIONAL-SUM -ADDIERER........................................................................................................... 224 7.5.5 P RAEFIX-A DDIERER..............................................................................................................................227 7.5.6 CARRY-SAVE-ADDIERER........................................................................................................................229 7.6 INKREM ENTIERER.................................................................................................................................................232 7.7 S U B TRAH IERER....................................................................................................................................................233 7.8 M U LTIP LIZIERER.................................................................................................................................................234 7.8.1 M ATRIXMULTIPLIZIERER........................................................................................................................235 7.8.2 CARRY-SAVE-MULTIPLIZIERER.............................................................................................................. 238 7.8.3 WALLACE-TREE-MULTIPLIZIERER...........................................................................................................241 7.8.4 DADDA-TREE-MULTIPLIZIERER.............................................................................................................. 246 7.9 B ARREL-S H IFTER.................................................................................................................................................249 7.10 ARITHMETISCH-LOGISCHE E INHEIT........................................................................................................................251 7.11 PROGRAMMIERBARE LOGIKBAUSTEINE................................................................................................................. 253 7.12 UEBUNGSAUFGABEN..............................................................................................................................................256 8 SCHALTWERKE 265 8.1 DIGITALE SPEICHERELEMENTE ........................................................... 266 8.1.1 ASYNCHRONE SPEICHERELEMENTE........................................................................................................267 8.1.2 TAKTZUSTANDSGESTEUERTE SPEICHERELEMENTE.....................................................................................271 8.1.3 TAKTFLANKENGESTEUERTE SPEICHERELEM ENTE.....................................................................................274 8.1.4 BEVORRECHTIGTE EINGAENGE................................................................................................................. 281 8.1.5 CM OS-IM PLEM ENTIERUNG.............................................................................................................. 282 8.2 VOM FLIPFLOP ZUM SCHALTWERK....................................................................................................................... 285 8.2.1 ENDLICHE AUTOMATEN . . . ............................................................................................................286 8.2.2 SCHALTW ERKSYNTHESE....................................................................................................................... 289 8.3 UEBUNGSAUFGABEN..............................................................................................................................................293 9 STANDARDSCHALTWERKE 299 9.1 R E G IS TE R .......................................................................................................................................................... 300 9.1.1 A U FFANGREGISTER..............................................................................................................................300 9.1.2 SCHIEBEREGISTER.................................................................................................................................302 9.1.3 UNIVERSALREGISTER..............................................................................................................................304 9.1.4 AKKUMULATOREN ..............................................................................................................................305 9.2 Z AE H L E R ............................................................................................................................................................. 308 9.2.1 SYNCHRONE BINAERZAEHLER.................................................................................................................... 309 9.2.2 ASYNCHRONE BINAERZAEHLER................................................................................................................. 313 9.2.3 M ISCH ZAEH LER.................................................................................................................................... 314 9.2.4 INSTRUKTIONSZAEHLER...........................................................................................................................316 9.3 H AUPTSPEICHER................................................................................................................................................. 318 9.3.1 SRAM -SPEICHER.............................................................................................................................. 318 9.3.2 DRAM-SPEICHER.............................................................................................................................. 320 9.3.3 FEHLERERKENNUNG UND -KORREKTUR..................................................................................................... 327 9.4 UEBUNGSAUFGABEN.............................................................................................................................................. 330 10 REGISTER-TRANSFER-ENTWURF 335 10.1 ENTWURF KOMPLEXER SYSTEM E........................................................................................................................... 336 10.1.1 OPERATIONSWERKSYNTHESE..................................................................................................................338 10.1.2 STEUERW ERKSYNTHESE........................................................................................................................340 10.2 MIKROPROGRAMMIERUNG ................................................................................................................................. 343 10.3 UEBUNGSAUFGABEN.............................................................................................................................................. 349 11 MIKROPROZESSORTECHNIK 351 11.1 ELEMENTE EINES MIKRORECHNERS .....................................................................................................................352 11.1.1 VOEN-NEUMANN-ARCHITEKTUR ........................................................................................................... 352 11.1.2 AUFBAU DER C P U .............................................................................................................................. 356 11.2 EIN EINFACHER M ODELLPROZESSOR.....................................................................................................................360 11.3 UEBUNGSAUFGABEN.............................................................................................................................................. 374 12 RECHNERSTRUKTUREN 377 12.1 RECHNERKLASSIFIKATION NACH F LY N N ............................................................ 378 12.2 INSTRUKTIONSARCHITEKTUREN.............................................................................................................................. 379 12.2.1 CISC-PROZESSOREN........................................................................................................................... 380 12.2.2 RISC-PROZESSOREN........................................................................................................................... 384 12.3 METHODEN ZUR LEISTUNGSSTEIGERUNG.............................................................................................................. 388 12.3.1 P IP E LIN IN G ........................................................................................................................................388 12.3.2 C ACHE-S PEICHER.............................................................................................................................. 393 12.4 LEISTUNGSBEWERTUNG........................................................................................................................................399 12.4.1 MASSZAHLEN ZUR LEISTUNGSBEWERTUNG...............................................................................................399 12.4.2 B ENCHM ARKS.................................................................................................................................... 402 12.5 UEBUNGSAUFGABEN..............................................................................................................................................405 A NOTATIONSVERZEICHNIS 411 B ABKUERZUNGSVERZEICHNIS 413 C GLOSSAR 415 LITERATURVERZEICHNIS 433 NAMENSVERZEICHNIS 437 SACHWORTVERZEICHNIS 439
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spellingShingle	Hoffmann, Dirk W. 1972- Grundlagen der Technischen Informatik 57 Tabellen Technische Informatik (DE-588)4196734-3 gnd
subject_GND	(DE-588)4196734-3 (DE-588)4123623-3
title	Grundlagen der Technischen Informatik 57 Tabellen
title_auth	Grundlagen der Technischen Informatik 57 Tabellen
title_exact_search	Grundlagen der Technischen Informatik 57 Tabellen
title_full	Grundlagen der Technischen Informatik 57 Tabellen Dirk W. Hoffmann
title_fullStr	Grundlagen der Technischen Informatik 57 Tabellen Dirk W. Hoffmann
title_full_unstemmed	Grundlagen der Technischen Informatik 57 Tabellen Dirk W. Hoffmann
title_short	Grundlagen der Technischen Informatik
title_sort	grundlagen der technischen informatik 57 tabellen
title_sub	57 Tabellen
topic	Technische Informatik (DE-588)4196734-3 gnd
topic_facet	Technische Informatik Lehrbuch
url	http://bvbr.bib-bvb.de:8991/F?func=service&doc_library=BVB01&local_base=BVB01&doc_number=029164386&sequence=000001&line_number=0001&func_code=DB_RECORDS&service_type=MEDIA
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