Multilevel Optimization in VLSICAD:
Gespeichert in:
Beteilige Person: | |
---|---|
Format: | Elektronisch E-Book |
Sprache: | Englisch |
Veröffentlicht: |
Boston, MA
Springer US
2003
|
Schriftenreihe: | Combinatorial Optimization
14 |
Schlagwörter: | |
Links: | https://doi.org/10.1007/978-1-4757-3748-6 |
Beschreibung: | In the last few decades, multiscale algorithms have become a dominant trend in large-scale scientific computation. Researchers have successfully applied these methods to a wide range of simulation and optimization problems. This book gives a general overview of multiscale algorithms; applications to general combinatorial optimization problems such as graph partitioning and the traveling salesman problem; and VLSICAD applications, including circuit partitioning, placement, and VLSI routing. Additional chapters discuss optimization in reconfigurable computing, convergence in multilevel optimization, and model problems with PDE constraints. Audience: Written at the graduate level, the book is intended for engineers and mathematical and computational scientists studying large-scale optimization in electronic design automation |
Umfang: | 1 Online-Ressource (XIX, 299 p) |
ISBN: | 9781475737486 9781441952400 |
ISSN: | 1388-3011 |
DOI: | 10.1007/978-1-4757-3748-6 |
Internformat
MARC
LEADER | 00000nam a2200000zcb4500 | ||
---|---|---|---|
001 | BV042421520 | ||
003 | DE-604 | ||
005 | 00000000000000.0 | ||
007 | cr|uuu---uuuuu | ||
008 | 150317s2003 xx o|||| 00||| eng d | ||
020 | |a 9781475737486 |c Online |9 978-1-4757-3748-6 | ||
020 | |a 9781441952400 |c Print |9 978-1-4419-5240-0 | ||
024 | 7 | |a 10.1007/978-1-4757-3748-6 |2 doi | |
035 | |a (OCoLC)863912405 | ||
035 | |a (DE-599)BVBBV042421520 | ||
040 | |a DE-604 |b ger |e aacr | ||
041 | 0 | |a eng | |
049 | |a DE-384 |a DE-703 |a DE-91 |a DE-634 | ||
082 | 0 | |a 621.3815 |2 23 | |
084 | |a MAT 000 |2 stub | ||
100 | 1 | |a Cong, Jason |e Verfasser |4 aut | |
245 | 1 | 0 | |a Multilevel Optimization in VLSICAD |c edited by Jason Cong, Joseph R. Shinnerl |
264 | 1 | |a Boston, MA |b Springer US |c 2003 | |
300 | |a 1 Online-Ressource (XIX, 299 p) | ||
336 | |b txt |2 rdacontent | ||
337 | |b c |2 rdamedia | ||
338 | |b cr |2 rdacarrier | ||
490 | 0 | |a Combinatorial Optimization |v 14 |x 1388-3011 | |
500 | |a In the last few decades, multiscale algorithms have become a dominant trend in large-scale scientific computation. Researchers have successfully applied these methods to a wide range of simulation and optimization problems. This book gives a general overview of multiscale algorithms; applications to general combinatorial optimization problems such as graph partitioning and the traveling salesman problem; and VLSICAD applications, including circuit partitioning, placement, and VLSI routing. Additional chapters discuss optimization in reconfigurable computing, convergence in multilevel optimization, and model problems with PDE constraints. Audience: Written at the graduate level, the book is intended for engineers and mathematical and computational scientists studying large-scale optimization in electronic design automation | ||
650 | 4 | |a Engineering | |
650 | 4 | |a Computer aided design | |
650 | 4 | |a Algorithms | |
650 | 4 | |a Mathematical optimization | |
650 | 4 | |a Computer engineering | |
650 | 4 | |a Systems engineering | |
650 | 4 | |a Circuits and Systems | |
650 | 4 | |a Electrical Engineering | |
650 | 4 | |a Optimization | |
650 | 4 | |a Computer-Aided Engineering (CAD, CAE) and Design | |
650 | 4 | |a Ingenieurwissenschaften | |
650 | 0 | 7 | |a VLSI |0 (DE-588)4117388-0 |2 gnd |9 rswk-swf |
650 | 0 | 7 | |a Multi-level-Verfahren |0 (DE-588)4344428-3 |2 gnd |9 rswk-swf |
650 | 0 | 7 | |a CAD |0 (DE-588)4069794-0 |2 gnd |9 rswk-swf |
689 | 0 | 0 | |a VLSI |0 (DE-588)4117388-0 |D s |
689 | 0 | 1 | |a CAD |0 (DE-588)4069794-0 |D s |
689 | 0 | 2 | |a Multi-level-Verfahren |0 (DE-588)4344428-3 |D s |
689 | 0 | |8 1\p |5 DE-604 | |
700 | 1 | |a Shinnerl, Joseph R. |e Sonstige |4 oth | |
856 | 4 | 0 | |u https://doi.org/10.1007/978-1-4757-3748-6 |x Verlag |3 Volltext |
912 | |a ZDB-2-SMA | ||
912 | |a ZDB-2-BAE | ||
940 | 1 | |q ZDB-2-SMA_Archive | |
883 | 1 | |8 1\p |a cgwrk |d 20201028 |q DE-101 |u https://d-nb.info/provenance/plan#cgwrk | |
943 | 1 | |a oai:aleph.bib-bvb.de:BVB01-027856937 |
Datensatz im Suchindex
DE-BY-TUM_katkey | 2068529 |
---|---|
_version_ | 1821931218746212352 |
any_adam_object | |
author | Cong, Jason |
author_facet | Cong, Jason |
author_role | aut |
author_sort | Cong, Jason |
author_variant | j c jc |
building | Verbundindex |
bvnumber | BV042421520 |
classification_tum | MAT 000 |
collection | ZDB-2-SMA ZDB-2-BAE |
ctrlnum | (OCoLC)863912405 (DE-599)BVBBV042421520 |
dewey-full | 621.3815 |
dewey-hundreds | 600 - Technology (Applied sciences) |
dewey-ones | 621 - Applied physics |
dewey-raw | 621.3815 |
dewey-search | 621.3815 |
dewey-sort | 3621.3815 |
dewey-tens | 620 - Engineering and allied operations |
discipline | Mathematik Elektrotechnik / Elektronik / Nachrichtentechnik |
doi_str_mv | 10.1007/978-1-4757-3748-6 |
format | Electronic eBook |
fullrecord | <?xml version="1.0" encoding="UTF-8"?><collection xmlns="http://www.loc.gov/MARC21/slim"><record><leader>02923nam a2200613zcb4500</leader><controlfield tag="001">BV042421520</controlfield><controlfield tag="003">DE-604</controlfield><controlfield tag="005">00000000000000.0</controlfield><controlfield tag="007">cr|uuu---uuuuu</controlfield><controlfield tag="008">150317s2003 xx o|||| 00||| eng d</controlfield><datafield tag="020" ind1=" " ind2=" "><subfield code="a">9781475737486</subfield><subfield code="c">Online</subfield><subfield code="9">978-1-4757-3748-6</subfield></datafield><datafield tag="020" ind1=" " ind2=" "><subfield code="a">9781441952400</subfield><subfield code="c">Print</subfield><subfield code="9">978-1-4419-5240-0</subfield></datafield><datafield tag="024" ind1="7" ind2=" "><subfield code="a">10.1007/978-1-4757-3748-6</subfield><subfield code="2">doi</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(OCoLC)863912405</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(DE-599)BVBBV042421520</subfield></datafield><datafield tag="040" ind1=" " ind2=" "><subfield code="a">DE-604</subfield><subfield code="b">ger</subfield><subfield code="e">aacr</subfield></datafield><datafield tag="041" ind1="0" ind2=" "><subfield code="a">eng</subfield></datafield><datafield tag="049" ind1=" " ind2=" "><subfield code="a">DE-384</subfield><subfield code="a">DE-703</subfield><subfield code="a">DE-91</subfield><subfield code="a">DE-634</subfield></datafield><datafield tag="082" ind1="0" ind2=" "><subfield code="a">621.3815</subfield><subfield code="2">23</subfield></datafield><datafield tag="084" ind1=" " ind2=" "><subfield code="a">MAT 000</subfield><subfield code="2">stub</subfield></datafield><datafield tag="100" ind1="1" ind2=" "><subfield code="a">Cong, Jason</subfield><subfield code="e">Verfasser</subfield><subfield code="4">aut</subfield></datafield><datafield tag="245" ind1="1" ind2="0"><subfield code="a">Multilevel Optimization in VLSICAD</subfield><subfield code="c">edited by Jason Cong, Joseph R. Shinnerl</subfield></datafield><datafield tag="264" ind1=" " ind2="1"><subfield code="a">Boston, MA</subfield><subfield code="b">Springer US</subfield><subfield code="c">2003</subfield></datafield><datafield tag="300" ind1=" " ind2=" "><subfield code="a">1 Online-Ressource (XIX, 299 p)</subfield></datafield><datafield tag="336" ind1=" " ind2=" "><subfield code="b">txt</subfield><subfield code="2">rdacontent</subfield></datafield><datafield tag="337" ind1=" " ind2=" "><subfield code="b">c</subfield><subfield code="2">rdamedia</subfield></datafield><datafield tag="338" ind1=" " ind2=" "><subfield code="b">cr</subfield><subfield code="2">rdacarrier</subfield></datafield><datafield tag="490" ind1="0" ind2=" "><subfield code="a">Combinatorial Optimization</subfield><subfield code="v">14</subfield><subfield code="x">1388-3011</subfield></datafield><datafield tag="500" ind1=" " ind2=" "><subfield code="a">In the last few decades, multiscale algorithms have become a dominant trend in large-scale scientific computation. Researchers have successfully applied these methods to a wide range of simulation and optimization problems. This book gives a general overview of multiscale algorithms; applications to general combinatorial optimization problems such as graph partitioning and the traveling salesman problem; and VLSICAD applications, including circuit partitioning, placement, and VLSI routing. Additional chapters discuss optimization in reconfigurable computing, convergence in multilevel optimization, and model problems with PDE constraints. Audience: Written at the graduate level, the book is intended for engineers and mathematical and computational scientists studying large-scale optimization in electronic design automation</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Engineering</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Computer aided design</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Algorithms</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Mathematical optimization</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Computer engineering</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Systems engineering</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Circuits and Systems</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Electrical Engineering</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Optimization</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Computer-Aided Engineering (CAD, CAE) and Design</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Ingenieurwissenschaften</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">VLSI</subfield><subfield code="0">(DE-588)4117388-0</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">Multi-level-Verfahren</subfield><subfield code="0">(DE-588)4344428-3</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">CAD</subfield><subfield code="0">(DE-588)4069794-0</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="689" ind1="0" ind2="0"><subfield code="a">VLSI</subfield><subfield code="0">(DE-588)4117388-0</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="0" ind2="1"><subfield code="a">CAD</subfield><subfield code="0">(DE-588)4069794-0</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="0" ind2="2"><subfield code="a">Multi-level-Verfahren</subfield><subfield code="0">(DE-588)4344428-3</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="0" ind2=" "><subfield code="8">1\p</subfield><subfield code="5">DE-604</subfield></datafield><datafield tag="700" ind1="1" ind2=" "><subfield code="a">Shinnerl, Joseph R.</subfield><subfield code="e">Sonstige</subfield><subfield code="4">oth</subfield></datafield><datafield tag="856" ind1="4" ind2="0"><subfield code="u">https://doi.org/10.1007/978-1-4757-3748-6</subfield><subfield code="x">Verlag</subfield><subfield code="3">Volltext</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">ZDB-2-SMA</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">ZDB-2-BAE</subfield></datafield><datafield tag="940" ind1="1" ind2=" "><subfield code="q">ZDB-2-SMA_Archive</subfield></datafield><datafield tag="883" ind1="1" ind2=" "><subfield code="8">1\p</subfield><subfield code="a">cgwrk</subfield><subfield code="d">20201028</subfield><subfield code="q">DE-101</subfield><subfield code="u">https://d-nb.info/provenance/plan#cgwrk</subfield></datafield><datafield tag="943" ind1="1" ind2=" "><subfield code="a">oai:aleph.bib-bvb.de:BVB01-027856937</subfield></datafield></record></collection> |
id | DE-604.BV042421520 |
illustrated | Not Illustrated |
indexdate | 2024-12-20T17:10:44Z |
institution | BVB |
isbn | 9781475737486 9781441952400 |
issn | 1388-3011 |
language | English |
oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-027856937 |
oclc_num | 863912405 |
open_access_boolean | |
owner | DE-384 DE-703 DE-91 DE-BY-TUM DE-634 |
owner_facet | DE-384 DE-703 DE-91 DE-BY-TUM DE-634 |
physical | 1 Online-Ressource (XIX, 299 p) |
psigel | ZDB-2-SMA ZDB-2-BAE ZDB-2-SMA_Archive |
publishDate | 2003 |
publishDateSearch | 2003 |
publishDateSort | 2003 |
publisher | Springer US |
record_format | marc |
series2 | Combinatorial Optimization |
spellingShingle | Cong, Jason Multilevel Optimization in VLSICAD Engineering Computer aided design Algorithms Mathematical optimization Computer engineering Systems engineering Circuits and Systems Electrical Engineering Optimization Computer-Aided Engineering (CAD, CAE) and Design Ingenieurwissenschaften VLSI (DE-588)4117388-0 gnd Multi-level-Verfahren (DE-588)4344428-3 gnd CAD (DE-588)4069794-0 gnd |
subject_GND | (DE-588)4117388-0 (DE-588)4344428-3 (DE-588)4069794-0 |
title | Multilevel Optimization in VLSICAD |
title_auth | Multilevel Optimization in VLSICAD |
title_exact_search | Multilevel Optimization in VLSICAD |
title_full | Multilevel Optimization in VLSICAD edited by Jason Cong, Joseph R. Shinnerl |
title_fullStr | Multilevel Optimization in VLSICAD edited by Jason Cong, Joseph R. Shinnerl |
title_full_unstemmed | Multilevel Optimization in VLSICAD edited by Jason Cong, Joseph R. Shinnerl |
title_short | Multilevel Optimization in VLSICAD |
title_sort | multilevel optimization in vlsicad |
topic | Engineering Computer aided design Algorithms Mathematical optimization Computer engineering Systems engineering Circuits and Systems Electrical Engineering Optimization Computer-Aided Engineering (CAD, CAE) and Design Ingenieurwissenschaften VLSI (DE-588)4117388-0 gnd Multi-level-Verfahren (DE-588)4344428-3 gnd CAD (DE-588)4069794-0 gnd |
topic_facet | Engineering Computer aided design Algorithms Mathematical optimization Computer engineering Systems engineering Circuits and Systems Electrical Engineering Optimization Computer-Aided Engineering (CAD, CAE) and Design Ingenieurwissenschaften VLSI Multi-level-Verfahren CAD |
url | https://doi.org/10.1007/978-1-4757-3748-6 |
work_keys_str_mv | AT congjason multileveloptimizationinvlsicad AT shinnerljosephr multileveloptimizationinvlsicad |