Source-synchronous Networks-on-Chip: circuit and architectural interconnect modeling
Gespeichert in:
| Beteiligte Personen: | , , |
|---|---|
| Format: | Buch |
| Sprache: | Englisch |
| Veröffentlicht: |
New York, NY
Springer
2014
|
| Schlagwörter: | |
| Umfang: | XIII, 143 S. Ill., graph. Darst. |
| ISBN: | 9781461494041 |
Internformat
MARC
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| 020 | |a 9781461494041 |9 978-1-4614-9404-1 | ||
| 035 | |a (Springer)978-1-4614-9405-8 | ||
| 035 | |a (OCoLC)915306416 | ||
| 035 | |a (DE-599)HBZTT050424318 | ||
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| 100 | 1 | |a Mandal, Ayan |e Verfasser |4 aut | |
| 245 | 1 | 0 | |a Source-synchronous Networks-on-Chip |b circuit and architectural interconnect modeling |c Ayan Mandal ; Sunil P. Khatri ; Rabi Mahapatra |
| 264 | 1 | |a New York, NY |b Springer |c 2014 | |
| 300 | |a XIII, 143 S. |b Ill., graph. Darst. | ||
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| 700 | 1 | |a Khatri, Sunil P. |d 1965- |e Verfasser |0 (DE-588)173583199 |4 aut | |
| 700 | 1 | |a Mahapatra, Rabi |e Verfasser |4 aut | |
| 776 | 0 | 8 | |i Erscheint auch als |n Online-Ausgabe |z 978-1-4614-9405-8 |
| 943 | 1 | |a oai:aleph.bib-bvb.de:BVB01-026919638 | |
Datensatz im Suchindex
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| any_adam_object | |
| author | Mandal, Ayan Khatri, Sunil P. 1965- Mahapatra, Rabi |
| author_GND | (DE-588)173583199 |
| author_facet | Mandal, Ayan Khatri, Sunil P. 1965- Mahapatra, Rabi |
| author_role | aut aut aut |
| author_sort | Mandal, Ayan |
| author_variant | a m am s p k sp spk r m rm |
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| classification_rvk | ST 190 ST 200 |
| ctrlnum | (Springer)978-1-4614-9405-8 (OCoLC)915306416 (DE-599)HBZTT050424318 |
| discipline | Informatik |
| format | Book |
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| id | DE-604.BV041473542 |
| illustrated | Illustrated |
| indexdate | 2024-12-20T16:48:12Z |
| institution | BVB |
| isbn | 9781461494041 |
| language | English |
| oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-026919638 |
| oclc_num | 915306416 |
| open_access_boolean | |
| owner | DE-11 |
| owner_facet | DE-11 |
| physical | XIII, 143 S. Ill., graph. Darst. |
| publishDate | 2014 |
| publishDateSearch | 2014 |
| publishDateSort | 2014 |
| publisher | Springer |
| record_format | marc |
| spelling | Mandal, Ayan Verfasser aut Source-synchronous Networks-on-Chip circuit and architectural interconnect modeling Ayan Mandal ; Sunil P. Khatri ; Rabi Mahapatra New York, NY Springer 2014 XIII, 143 S. Ill., graph. Darst. txt rdacontent n rdamedia nc rdacarrier Informatik Ingenieurwissenschaften Engineering Computer science Electronics Systems engineering Khatri, Sunil P. 1965- Verfasser (DE-588)173583199 aut Mahapatra, Rabi Verfasser aut Erscheint auch als Online-Ausgabe 978-1-4614-9405-8 |
| spellingShingle | Mandal, Ayan Khatri, Sunil P. 1965- Mahapatra, Rabi Source-synchronous Networks-on-Chip circuit and architectural interconnect modeling Informatik Ingenieurwissenschaften Engineering Computer science Electronics Systems engineering |
| title | Source-synchronous Networks-on-Chip circuit and architectural interconnect modeling |
| title_auth | Source-synchronous Networks-on-Chip circuit and architectural interconnect modeling |
| title_exact_search | Source-synchronous Networks-on-Chip circuit and architectural interconnect modeling |
| title_full | Source-synchronous Networks-on-Chip circuit and architectural interconnect modeling Ayan Mandal ; Sunil P. Khatri ; Rabi Mahapatra |
| title_fullStr | Source-synchronous Networks-on-Chip circuit and architectural interconnect modeling Ayan Mandal ; Sunil P. Khatri ; Rabi Mahapatra |
| title_full_unstemmed | Source-synchronous Networks-on-Chip circuit and architectural interconnect modeling Ayan Mandal ; Sunil P. Khatri ; Rabi Mahapatra |
| title_short | Source-synchronous Networks-on-Chip |
| title_sort | source synchronous networks on chip circuit and architectural interconnect modeling |
| title_sub | circuit and architectural interconnect modeling |
| topic | Informatik Ingenieurwissenschaften Engineering Computer science Electronics Systems engineering |
| topic_facet | Informatik Ingenieurwissenschaften Engineering Computer science Electronics Systems engineering |
| work_keys_str_mv | AT mandalayan sourcesynchronousnetworksonchipcircuitandarchitecturalinterconnectmodeling AT khatrisunilp sourcesynchronousnetworksonchipcircuitandarchitecturalinterconnectmodeling AT mahapatrarabi sourcesynchronousnetworksonchipcircuitandarchitecturalinterconnectmodeling |