Electromigration modeling at circuit layout level:
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Record in the Search Index
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| adam_text | ELECTROMIGRATION MODELING AT CIRCUIT LAYOUT LEVEL
/ TAN, CHER MING
: 2013
TABLE OF CONTENTS / INHALTSVERZEICHNIS
INTRODUCTION
3D CIRCUIT MODEL CONSTRUCTION AND SIMULATION
COMPARISON OF EM PERFORMANCE IN CIRCUIT STRUCTURE AND TEST STRUCTURE
INTERCONNECT EM RELIABILITY MODELING AT CIRCUIT LAYOUT LEVEL
CONCLUSION
DIESES SCHRIFTSTUECK WURDE MASCHINELL ERZEUGT.
ELECTROMIGRATION MODELING AT CIRCUIT LAYOUT LEVEL
/ TAN, CHER MING
: 2013
ABSTRACT / INHALTSTEXT
INTEGRATED CIRCUIT (IC) RELIABILITY IS OF INCREASING CONCERN IN
PRESENT-DAY IC TECHNOLOGY WHERE THE INTERCONNECT FAILURES SIGNIFICANTLY
INCREASES THE FAILURE RATE FOR ICS WITH DECREASING INTERCONNECT
DIMENSION AND INCREASING NUMBER OF INTERCONNECT LEVELS.
ELECTROMIGRATION (EM) OF INTERCONNECTS HAS NOW BECOME THE DOMINANT
FAILURE MECHANISM THAT DETERMINES THE CIRCUIT RELIABILITY. THIS BRIEF
ADDRESSES THE READERS TO THE NECESSITY OF 3D REAL CIRCUIT MODELLING IN
ORDER TO EVALUATE THE EM OF INTERCONNECT SYSTEM IN ICS, AND HOW THEY CAN
CREATE SUCH MODELS FOR THEIR OWN APPLICATIONS. A 3-DIMENSIONAL (3D)
ELECTRO-THERMO-STRUCTURAL MODEL AS OPPOSED TO THE CONVENTIONAL CURRENT
DENSITY BASED 2-DIMENSIONAL (2D) MODELS IS PRESENTED AT CIRCUIT-LAYOUT
LEVEL.
DIESES SCHRIFTSTUECK WURDE MASCHINELL ERZEUGT.
|
| any_adam_object | 1 |
| author | Tan, Cher Ming |
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| discipline | Wirtschaftswissenschaften |
| doi_str_mv | 10.1007/978-981-4451-21-5 |
| format | Electronic eBook |
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| id | DE-604.BV041155931 |
| illustrated | Not Illustrated |
| indexdate | 2024-12-20T16:32:01Z |
| institution | BVB |
| isbn | 9789814451215 |
| language | English |
| oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-026131300 |
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| publishDate | 2013 |
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| publisher | Springer |
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| series2 | SpringerBriefs in applied sciences and technology |
| spellingShingle | Tan, Cher Ming Electromigration modeling at circuit layout level Ingenieurwissenschaften System safety Engineering |
| title | Electromigration modeling at circuit layout level |
| title_auth | Electromigration modeling at circuit layout level |
| title_exact_search | Electromigration modeling at circuit layout level |
| title_full | Electromigration modeling at circuit layout level Cher Ming Tan ; Feifei He |
| title_fullStr | Electromigration modeling at circuit layout level Cher Ming Tan ; Feifei He |
| title_full_unstemmed | Electromigration modeling at circuit layout level Cher Ming Tan ; Feifei He |
| title_short | Electromigration modeling at circuit layout level |
| title_sort | electromigration modeling at circuit layout level |
| topic | Ingenieurwissenschaften System safety Engineering |
| topic_facet | Ingenieurwissenschaften System safety Engineering |
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