Logic Design and simulation:
Gespeichert in:
| Weitere beteiligte Personen: | |
|---|---|
| Format: | Buch |
| Sprache: | Nichtbestimmte Sprache |
| Veröffentlicht: |
Amsterdam <<[u.a.]>>
North-Holland
1986
|
| Schriftenreihe: | Advances in CAD for VLSI
2 |
| Schlagwörter: | |
| Umfang: | X, 286 S. |
| ISBN: | 0444878920 |
Internformat
MARC
| LEADER | 00000nam a2200000 cb4500 | ||
|---|---|---|---|
| 001 | BV024668142 | ||
| 003 | DE-604 | ||
| 005 | 20090910 | ||
| 007 | t| | ||
| 008 | 090924s1986 xx |||| 00||| und d | ||
| 020 | |a 0444878920 |9 0-444-87892-0 | ||
| 035 | |a (OCoLC)830743101 | ||
| 035 | |a (DE-599)BVBBV024668142 | ||
| 040 | |a DE-604 |b ger |e rakwb | ||
| 041 | |a und | ||
| 049 | |a DE-83 | ||
| 084 | |a ST 190 |0 (DE-625)143607: |2 rvk | ||
| 084 | |a ST 195 |0 (DE-625)143608: |2 rvk | ||
| 084 | |a ZN 4950 |0 (DE-625)157424: |2 rvk | ||
| 245 | 1 | 0 | |a Logic Design and simulation |c ed. by E. Hörbst |
| 264 | 1 | |a Amsterdam <<[u.a.]>> |b North-Holland |c 1986 | |
| 300 | |a X, 286 S. | ||
| 336 | |b txt |2 rdacontent | ||
| 337 | |b n |2 rdamedia | ||
| 338 | |b nc |2 rdacarrier | ||
| 490 | 0 | |a Advances in CAD for VLSI |v 2 | |
| 650 | 0 | 7 | |a Logischer Entwurf |0 (DE-588)4168051-0 |2 gnd |9 rswk-swf |
| 650 | 0 | 7 | |a CAD |0 (DE-588)4069794-0 |2 gnd |9 rswk-swf |
| 650 | 0 | 7 | |a Simulation |0 (DE-588)4055072-2 |2 gnd |9 rswk-swf |
| 650 | 0 | 7 | |a VLSI |0 (DE-588)4117388-0 |2 gnd |9 rswk-swf |
| 655 | 7 | |a ICAD |2 gnd |9 rswk-swf | |
| 689 | 0 | 0 | |a VLSI |0 (DE-588)4117388-0 |D s |
| 689 | 0 | 1 | |a CAD |0 (DE-588)4069794-0 |D s |
| 689 | 0 | 2 | |a Logischer Entwurf |0 (DE-588)4168051-0 |D s |
| 689 | 0 | |5 DE-604 | |
| 689 | 1 | 0 | |a VLSI |0 (DE-588)4117388-0 |D s |
| 689 | 1 | 1 | |a Simulation |0 (DE-588)4055072-2 |D s |
| 689 | 1 | |5 DE-604 | |
| 689 | 2 | 0 | |a ICAD |A f |
| 689 | 2 | |5 DE-604 | |
| 689 | 3 | 0 | |a VLSI |0 (DE-588)4117388-0 |D s |
| 689 | 3 | |5 DE-604 | |
| 689 | 4 | 0 | |a VLSI |0 (DE-588)4117388-0 |D s |
| 689 | 4 | 1 | |a CAD |0 (DE-588)4069794-0 |D s |
| 689 | 4 | |5 DE-604 | |
| 700 | 1 | |a Hörbst, Egon |4 edt | |
| 940 | 1 | |q TUB-nse | |
| 943 | 1 | |a oai:aleph.bib-bvb.de:BVB01-018079165 | |
Datensatz im Suchindex
| _version_ | 1818967539808468992 |
|---|---|
| any_adam_object | |
| author2 | Hörbst, Egon |
| author2_role | edt |
| author2_variant | e h eh |
| author_facet | Hörbst, Egon |
| building | Verbundindex |
| bvnumber | BV024668142 |
| classification_rvk | ST 190 ST 195 ZN 4950 |
| ctrlnum | (OCoLC)830743101 (DE-599)BVBBV024668142 |
| discipline | Informatik Elektrotechnik / Elektronik / Nachrichtentechnik |
| format | Book |
| fullrecord | <?xml version="1.0" encoding="UTF-8"?><collection xmlns="http://www.loc.gov/MARC21/slim"><record><leader>01661nam a2200541 cb4500</leader><controlfield tag="001">BV024668142</controlfield><controlfield tag="003">DE-604</controlfield><controlfield tag="005">20090910 </controlfield><controlfield tag="007">t|</controlfield><controlfield tag="008">090924s1986 xx |||| 00||| und d</controlfield><datafield tag="020" ind1=" " ind2=" "><subfield code="a">0444878920</subfield><subfield code="9">0-444-87892-0</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(OCoLC)830743101</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(DE-599)BVBBV024668142</subfield></datafield><datafield tag="040" ind1=" " ind2=" "><subfield code="a">DE-604</subfield><subfield code="b">ger</subfield><subfield code="e">rakwb</subfield></datafield><datafield tag="041" ind1=" " ind2=" "><subfield code="a">und</subfield></datafield><datafield tag="049" ind1=" " ind2=" "><subfield code="a">DE-83</subfield></datafield><datafield tag="084" ind1=" " ind2=" "><subfield code="a">ST 190</subfield><subfield code="0">(DE-625)143607:</subfield><subfield code="2">rvk</subfield></datafield><datafield tag="084" ind1=" " ind2=" "><subfield code="a">ST 195</subfield><subfield code="0">(DE-625)143608:</subfield><subfield code="2">rvk</subfield></datafield><datafield tag="084" ind1=" " ind2=" "><subfield code="a">ZN 4950</subfield><subfield code="0">(DE-625)157424:</subfield><subfield code="2">rvk</subfield></datafield><datafield tag="245" ind1="1" ind2="0"><subfield code="a">Logic Design and simulation</subfield><subfield code="c">ed. by E. Hörbst</subfield></datafield><datafield tag="264" ind1=" " ind2="1"><subfield code="a">Amsterdam <<[u.a.]>></subfield><subfield code="b">North-Holland</subfield><subfield code="c">1986</subfield></datafield><datafield tag="300" ind1=" " ind2=" "><subfield code="a">X, 286 S.</subfield></datafield><datafield tag="336" ind1=" " ind2=" "><subfield code="b">txt</subfield><subfield code="2">rdacontent</subfield></datafield><datafield tag="337" ind1=" " ind2=" "><subfield code="b">n</subfield><subfield code="2">rdamedia</subfield></datafield><datafield tag="338" ind1=" " ind2=" "><subfield code="b">nc</subfield><subfield code="2">rdacarrier</subfield></datafield><datafield tag="490" ind1="0" ind2=" "><subfield code="a">Advances in CAD for VLSI</subfield><subfield code="v">2</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">Logischer Entwurf</subfield><subfield code="0">(DE-588)4168051-0</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">CAD</subfield><subfield code="0">(DE-588)4069794-0</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">Simulation</subfield><subfield code="0">(DE-588)4055072-2</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">VLSI</subfield><subfield code="0">(DE-588)4117388-0</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="655" ind1=" " ind2="7"><subfield code="a">ICAD</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="689" ind1="0" ind2="0"><subfield code="a">VLSI</subfield><subfield code="0">(DE-588)4117388-0</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="0" ind2="1"><subfield code="a">CAD</subfield><subfield code="0">(DE-588)4069794-0</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="0" ind2="2"><subfield code="a">Logischer Entwurf</subfield><subfield code="0">(DE-588)4168051-0</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="0" ind2=" "><subfield code="5">DE-604</subfield></datafield><datafield tag="689" ind1="1" ind2="0"><subfield code="a">VLSI</subfield><subfield code="0">(DE-588)4117388-0</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="1" ind2="1"><subfield code="a">Simulation</subfield><subfield code="0">(DE-588)4055072-2</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="1" ind2=" "><subfield code="5">DE-604</subfield></datafield><datafield tag="689" ind1="2" ind2="0"><subfield code="a">ICAD</subfield><subfield code="A">f</subfield></datafield><datafield tag="689" ind1="2" ind2=" "><subfield code="5">DE-604</subfield></datafield><datafield tag="689" ind1="3" ind2="0"><subfield code="a">VLSI</subfield><subfield code="0">(DE-588)4117388-0</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="3" ind2=" "><subfield code="5">DE-604</subfield></datafield><datafield tag="689" ind1="4" ind2="0"><subfield code="a">VLSI</subfield><subfield code="0">(DE-588)4117388-0</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="4" ind2="1"><subfield code="a">CAD</subfield><subfield code="0">(DE-588)4069794-0</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="4" ind2=" "><subfield code="5">DE-604</subfield></datafield><datafield tag="700" ind1="1" ind2=" "><subfield code="a">Hörbst, Egon</subfield><subfield code="4">edt</subfield></datafield><datafield tag="940" ind1="1" ind2=" "><subfield code="q">TUB-nse</subfield></datafield><datafield tag="943" ind1="1" ind2=" "><subfield code="a">oai:aleph.bib-bvb.de:BVB01-018079165</subfield></datafield></record></collection> |
| genre | ICAD gnd |
| genre_facet | ICAD |
| id | DE-604.BV024668142 |
| illustrated | Not Illustrated |
| indexdate | 2024-12-20T13:50:25Z |
| institution | BVB |
| isbn | 0444878920 |
| language | Undetermined |
| oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-018079165 |
| oclc_num | 830743101 |
| open_access_boolean | |
| owner | DE-83 |
| owner_facet | DE-83 |
| physical | X, 286 S. |
| psigel | TUB-nse |
| publishDate | 1986 |
| publishDateSearch | 1986 |
| publishDateSort | 1986 |
| publisher | North-Holland |
| record_format | marc |
| series2 | Advances in CAD for VLSI |
| spelling | Logic Design and simulation ed. by E. Hörbst Amsterdam <<[u.a.]>> North-Holland 1986 X, 286 S. txt rdacontent n rdamedia nc rdacarrier Advances in CAD for VLSI 2 Logischer Entwurf (DE-588)4168051-0 gnd rswk-swf CAD (DE-588)4069794-0 gnd rswk-swf Simulation (DE-588)4055072-2 gnd rswk-swf VLSI (DE-588)4117388-0 gnd rswk-swf ICAD gnd rswk-swf VLSI (DE-588)4117388-0 s CAD (DE-588)4069794-0 s Logischer Entwurf (DE-588)4168051-0 s DE-604 Simulation (DE-588)4055072-2 s ICAD f Hörbst, Egon edt |
| spellingShingle | Logic Design and simulation Logischer Entwurf (DE-588)4168051-0 gnd CAD (DE-588)4069794-0 gnd Simulation (DE-588)4055072-2 gnd VLSI (DE-588)4117388-0 gnd |
| subject_GND | (DE-588)4168051-0 (DE-588)4069794-0 (DE-588)4055072-2 (DE-588)4117388-0 |
| title | Logic Design and simulation |
| title_auth | Logic Design and simulation |
| title_exact_search | Logic Design and simulation |
| title_full | Logic Design and simulation ed. by E. Hörbst |
| title_fullStr | Logic Design and simulation ed. by E. Hörbst |
| title_full_unstemmed | Logic Design and simulation ed. by E. Hörbst |
| title_short | Logic Design and simulation |
| title_sort | logic design and simulation |
| topic | Logischer Entwurf (DE-588)4168051-0 gnd CAD (DE-588)4069794-0 gnd Simulation (DE-588)4055072-2 gnd VLSI (DE-588)4117388-0 gnd |
| topic_facet | Logischer Entwurf CAD Simulation VLSI ICAD |
| work_keys_str_mv | AT horbstegon logicdesignandsimulation |