Verilog for digital design:
Saved in:
| Main Authors: | , |
|---|---|
| Format: | Book |
| Language: | English |
| Published: |
Hoboken, NJ
Wiley
2007
|
| Subjects: | |
| Physical Description: | XVI, 173 S. graph. Darst. |
| ISBN: | 9780470052624 |
Staff View
MARC
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Record in the Search Index
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| any_adam_object | |
| author | Vahid, Frank Lysecky, Roman |
| author_facet | Vahid, Frank Lysecky, Roman |
| author_role | aut aut |
| author_sort | Vahid, Frank |
| author_variant | f v fv r l rl |
| building | Verbundindex |
| bvnumber | BV022965979 |
| callnumber-first | T - Technology |
| callnumber-label | TK7885 |
| callnumber-raw | TK7885.7 |
| callnumber-search | TK7885.7 |
| callnumber-sort | TK 47885.7 |
| callnumber-subject | TK - Electrical and Nuclear Engineering |
| classification_rvk | ST 250 ZN 4904 |
| ctrlnum | (OCoLC)164375002 (DE-599)BVBBV022965979 |
| dewey-full | 621.392 |
| dewey-hundreds | 600 - Technology (Applied sciences) |
| dewey-ones | 621 - Applied physics |
| dewey-raw | 621.392 |
| dewey-search | 621.392 |
| dewey-sort | 3621.392 |
| dewey-tens | 620 - Engineering and allied operations |
| discipline | Informatik Elektrotechnik / Elektronik / Nachrichtentechnik |
| format | Book |
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| id | DE-604.BV022965979 |
| illustrated | Illustrated |
| indexdate | 2024-12-20T13:06:23Z |
| institution | BVB |
| isbn | 9780470052624 |
| language | English |
| oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-016170295 |
| oclc_num | 164375002 |
| open_access_boolean | |
| owner | DE-703 DE-83 |
| owner_facet | DE-703 DE-83 |
| physical | XVI, 173 S. graph. Darst. |
| publishDate | 2007 |
| publishDateSearch | 2007 |
| publishDateSort | 2007 |
| publisher | Wiley |
| record_format | marc |
| spelling | Vahid, Frank Verfasser aut Verilog for digital design Frank Vahid ; Roman Lysecky Hoboken, NJ Wiley 2007 XVI, 173 S. graph. Darst. txt rdacontent n rdamedia nc rdacarrier VHDL (Computer hardware description language) VERILOG (DE-588)4268385-3 gnd rswk-swf VERILOG (DE-588)4268385-3 s DE-604 Lysecky, Roman Verfasser aut |
| spellingShingle | Vahid, Frank Lysecky, Roman Verilog for digital design VHDL (Computer hardware description language) VERILOG (DE-588)4268385-3 gnd |
| subject_GND | (DE-588)4268385-3 |
| title | Verilog for digital design |
| title_auth | Verilog for digital design |
| title_exact_search | Verilog for digital design |
| title_full | Verilog for digital design Frank Vahid ; Roman Lysecky |
| title_fullStr | Verilog for digital design Frank Vahid ; Roman Lysecky |
| title_full_unstemmed | Verilog for digital design Frank Vahid ; Roman Lysecky |
| title_short | Verilog for digital design |
| title_sort | verilog for digital design |
| topic | VHDL (Computer hardware description language) VERILOG (DE-588)4268385-3 gnd |
| topic_facet | VHDL (Computer hardware description language) VERILOG |
| work_keys_str_mv | AT vahidfrank verilogfordigitaldesign AT lyseckyroman verilogfordigitaldesign |