System-on-a-chip verification: methodology and techniques
Gespeichert in:
| Beteiligte Personen: | , , |
|---|---|
| Format: | Buch |
| Sprache: | Englisch |
| Veröffentlicht: |
Boston, Mass. [u.a.]
Kluwer
2003
|
| Ausgabe: | 3. print. |
| Schlagwörter: | |
| Umfang: | XX, 372 S. graph. Darst. 25 cm. |
| ISBN: | 0792372794 |
Internformat
MARC
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| 100 | 1 | |a Rashinkar, Prakash |e Verfasser |4 aut | |
| 245 | 1 | 0 | |a System-on-a-chip verification |b methodology and techniques |c Prakash Rashinkar, Peter Paterson, Leena Singh |
| 246 | 1 | 3 | |a System on a chip verification |
| 250 | |a 3. print. | ||
| 264 | 1 | |a Boston, Mass. [u.a.] |b Kluwer |c 2003 | |
| 300 | |a XX, 372 S. |b graph. Darst. |c 25 cm. | ||
| 336 | |b txt |2 rdacontent | ||
| 337 | |b n |2 rdamedia | ||
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| 689 | 0 | 1 | |a Hardwareverifikation |0 (DE-588)4214982-4 |D s |
| 689 | 0 | |5 DE-604 | |
| 700 | 1 | |a Paterson, Peter |e Verfasser |4 aut | |
| 700 | 1 | |a Singh, Leena |e Verfasser |4 aut | |
| 943 | 1 | |a oai:aleph.bib-bvb.de:BVB01-013526385 | |
Datensatz im Suchindex
| DE-BY-TUM_call_number | 0002 ELT 359f 2005 A 8790 |
|---|---|
| DE-BY-TUM_katkey | 1524403 |
| DE-BY-TUM_location | 00 |
| DE-BY-TUM_media_number | 040006094080 |
| _version_ | 1821932674957180928 |
| any_adam_object | |
| author | Rashinkar, Prakash Paterson, Peter Singh, Leena |
| author_facet | Rashinkar, Prakash Paterson, Peter Singh, Leena |
| author_role | aut aut aut |
| author_sort | Rashinkar, Prakash |
| author_variant | p r pr p p pp l s ls |
| building | Verbundindex |
| bvnumber | BV020821011 |
| classification_tum | ELT 359f ELT 272f DAT 325f |
| ctrlnum | (OCoLC)180135208 (DE-599)BVBBV020821011 |
| discipline | Informatik Elektrotechnik / Elektronik / Nachrichtentechnik |
| edition | 3. print. |
| format | Book |
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| id | DE-604.BV020821011 |
| illustrated | Illustrated |
| indexdate | 2024-12-20T12:13:09Z |
| institution | BVB |
| isbn | 0792372794 |
| language | English |
| oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-013526385 |
| oclc_num | 180135208 |
| open_access_boolean | |
| owner | DE-91 DE-BY-TUM |
| owner_facet | DE-91 DE-BY-TUM |
| physical | XX, 372 S. graph. Darst. 25 cm. |
| publishDate | 2003 |
| publishDateSearch | 2003 |
| publishDateSort | 2003 |
| publisher | Kluwer |
| record_format | marc |
| spellingShingle | Rashinkar, Prakash Paterson, Peter Singh, Leena System-on-a-chip verification methodology and techniques Softwareentwicklung (DE-588)4116522-6 gnd Hardwareverifikation (DE-588)4214982-4 gnd |
| subject_GND | (DE-588)4116522-6 (DE-588)4214982-4 |
| title | System-on-a-chip verification methodology and techniques |
| title_alt | System on a chip verification |
| title_auth | System-on-a-chip verification methodology and techniques |
| title_exact_search | System-on-a-chip verification methodology and techniques |
| title_full | System-on-a-chip verification methodology and techniques Prakash Rashinkar, Peter Paterson, Leena Singh |
| title_fullStr | System-on-a-chip verification methodology and techniques Prakash Rashinkar, Peter Paterson, Leena Singh |
| title_full_unstemmed | System-on-a-chip verification methodology and techniques Prakash Rashinkar, Peter Paterson, Leena Singh |
| title_short | System-on-a-chip verification |
| title_sort | system on a chip verification methodology and techniques |
| title_sub | methodology and techniques |
| topic | Softwareentwicklung (DE-588)4116522-6 gnd Hardwareverifikation (DE-588)4214982-4 gnd |
| topic_facet | Softwareentwicklung Hardwareverifikation |
| work_keys_str_mv | AT rashinkarprakash systemonachipverificationmethodologyandtechniques AT patersonpeter systemonachipverificationmethodologyandtechniques AT singhleena systemonachipverificationmethodologyandtechniques AT rashinkarprakash systemonachipverification AT patersonpeter systemonachipverification AT singhleena systemonachipverification |
Paper/Kapitel scannen lassen
Teilbibliothek Stammgelände
| Signatur: |
0002 ELT 359f 2005 A 8790 Lageplan |
|---|---|
| Exemplar 1 | Ausleihbar Ausgeliehen – Rückgabe bis: 13.03.2025 |